diff mbox series

V10 patch #2, use PLI to load up large SImode constants if -mcpu=future

Message ID 20191212001515.GB27911@ibm-toto.the-meissners.org
State New
Headers show
Series V10 patch #2, use PLI to load up large SImode constants if -mcpu=future | expand

Commit Message

Michael Meissner Dec. 12, 2019, 12:15 a.m. UTC 
This patch adds an alternative to use PLI to load up large SImode constants if
-mcpu=future is used.

It is a slight reworking of patch V7 #2 after reformating the movsi_interal1
insn.  I have done bootstraps and make check on a power8 little endian system
and there were no regressions.  Can I check this patch in once patch V10 #1 is
checked in?

Patch V7 #2:
https://gcc.gnu.org/ml/gcc-patches/2019-11/msg01302.html

2019-12-09  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.md (movsi_internal1): Add alternative to
	use PLI to load up 34-bit constants if -mcpu=future.

Comments

Segher Boessenkool Dec. 17, 2019, 3:59 p.m. UTC | #1 
Hi!

On Wed, Dec 11, 2019 at 07:15:15PM -0500, Michael Meissner wrote:
> This patch adds an alternative to use PLI to load up large SImode constants if
> -mcpu=future is used.

> 
> 	* config/rs6000/rs6000.md (movsi_internal1): Add alternative to
> 	use PLI to load up 34-bit constants if -mcpu=future.

This is okay for trunk.  Thanks!


Segher
diff mbox series

Patch

Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 279143)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -6892,7 +6892,7 @@  (define_split
 ;;	   MR          LA
 ;;	   LWZ         LFIWZX      LXSIWZX
 ;;	   STW         STFIWX      STXSIWX
-;;	   LI          LIS         #
+;;	   LI          LIS         PLI         #
 ;;	   XXLOR       XXSPLTIB 0  XXSPLTIB -1 VSPLTISW
 ;;	   XXLXOR 0    XXLORC -1   P9 const
 ;;	   MTVSRWZ     MFVSRWZ
@@ -6903,7 +6903,7 @@  (define_insn "*movsi_internal1"
 	  "=r,         r,
 	   r,          d,          v,
 	   m,          Z,          Z,
-	   r,          r,          r,
+	   r,          r,          r,          r,
 	   wa,         wa,         wa,         v,
 	   wa,         v,          v,
 	   wa,         r,
@@ -6912,7 +6912,7 @@  (define_insn "*movsi_internal1"
 	  "r,          U,
 	   m,          Z,          Z,
 	   r,          d,          v,
-	   I,          L,          n,
+	   I,          L,          eI,         n,
 	   wa,         O,          wM,         wB,
 	   O,          wM,         wS,
 	   r,          wa,
@@ -6930,6 +6930,7 @@  (define_insn "*movsi_internal1"
    stxsiwx %x1,%y0
    li %0,%1
    lis %0,%v1
+   li %0,%1
    #
    xxlor %x0,%x1,%x1
    xxspltib %x0,0
@@ -6947,7 +6948,7 @@  (define_insn "*movsi_internal1"
 	  "*,          *,
 	   load,       fpload,     fpload,
 	   store,      fpstore,    fpstore,
-	   *,          *,          *,
+	   *,          *,          *,          *,
 	   veclogical, vecsimple,  vecsimple,  vecsimple,
 	   veclogical, veclogical, vecsimple,
 	   mffgpr,     mftgpr,
@@ -6956,7 +6957,7 @@  (define_insn "*movsi_internal1"
 	  "*,          *,
 	   *,          *,          *,
 	   *,          *,          *,
-	   *,          *,          8,
+	   *,          *,          *,          8,
 	   *,          *,          *,          *,
 	   *,          *,          8,
 	   *,          *,
@@ -6965,7 +6966,7 @@  (define_insn "*movsi_internal1"
 	  "*,          *,
 	   *,          p8v,        p8v,
 	   *,          p8v,        p8v,
-	   *,          *,          *,
+	   *,          *,          fut,        *,
 	   p8v,        p9v,        p9v,        p8v,
 	   p9v,        p8v,        p9v,
 	   p8v,        p8v,
@@ -7120,8 +7121,7 @@  (define_insn "*movsi_from_df"
 (define_split
   [(set (match_operand:SI 0 "gpc_reg_operand")
 	(match_operand:SI 1 "const_int_operand"))]
-  "(unsigned HOST_WIDE_INT) (INTVAL (operands[1]) + 0x8000) >= 0x10000
-   && (INTVAL (operands[1]) & 0xffff) != 0"
+  "num_insns_constant (operands[1], SImode) > 1"
   [(set (match_dup 0)
 	(match_dup 2))
    (set (match_dup 0)