===================================================================
@@ -93,6 +93,9 @@
#define PPC_FEATURE2_SCV 0x00100000
#define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
+/* These are not yet official. */
+#define PPC_FEATURE2_ARCH_3_1 0x00040000
+#define PPC_FEATURE2_MMA 0x00020000
/* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and
AT_HWCAP2 values. These must match the values defined in GLIBC. */
===================================================================
@@ -171,7 +171,9 @@ static const struct
{ "arch_3_00", PPC_FEATURE2_ARCH_3_00, 1 },
{ "ieee128", PPC_FEATURE2_HAS_IEEE128, 1 },
{ "darn", PPC_FEATURE2_DARN, 1 },
- { "scv", PPC_FEATURE2_SCV, 1 }
+ { "scv", PPC_FEATURE2_SCV, 1 },
+ { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 },
+ { "mma", PPC_FEATURE2_MMA, 1 },
};
static void altivec_init_builtins (void);
===================================================================
@@ -259,6 +259,7 @@ enum {
CLONE_ISA_2_06, /* ISA 2.06 (power7). */
CLONE_ISA_2_07, /* ISA 2.07 (power8). */
CLONE_ISA_3_00, /* ISA 3.00 (power9). */
+ CLONE_ISA_3_1, /* ISA 3.1 (future). */
CLONE_MAX
};
@@ -274,6 +275,7 @@ static const struct clone_map rs6000_clone_map[CLO
{ OPTION_MASK_POPCNTD, "arch_2_06" }, /* ISA 2.06 (power7). */
{ OPTION_MASK_P8_VECTOR, "arch_2_07" }, /* ISA 2.07 (power8). */
{ OPTION_MASK_P9_VECTOR, "arch_3_00" }, /* ISA 3.00 (power9). */
+ { OPTION_MASK_FUTURE, "arch_3_1" }, /* ISA 3.1 (future). */
};
===================================================================
@@ -0,0 +1,33 @@
+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */
+/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
+
+/* Power9 (aka, ISA 3.0) has a MODSD instruction to do modulus, while Power8
+ (aka, ISA 2.07) has to do modulus with divide and multiply. Make sure
+ both clone functions are generated.
+
+ FUTURE has pc-relative instructions to access static values, while earlier
+ systems used TOC addressing.
+
+ Restrict ourselves to Linux, since IFUNC might not be supported in other
+ operating systems. */
+
+static long s;
+long *p = &s;
+
+__attribute__((target_clones("cpu=future,cpu=power9,default")))
+long mod_func (long a, long b)
+{
+ return (a % b) + s;
+}
+
+long mod_func_or (long a, long b, long c)
+{
+ return mod_func (a, b) | c;
+}
+
+/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpld\M} 1 } } */
This patch adds support for using cpu=future in the "target" function attribute, "target" pragma support, and "target_clones" function attributes. In addition, it adds support for the following arguments to __builtin_cpu_supports: "arch_3_1" Whether ISA 3.1 is supported by the machine; "mma" Whether the MMA extension is supported by the machine. The hwcap2 bits used in the auxv table will be appearing in future Linux kernels. At this present time, there is no support for: __builtin_cpu_is ("future") I have built each of the patches on a little endian power8 system and there were no regressions in either the bootstrap or make check operations. Can I check this patch into the trunk after the other patches have been checked in? [gcc] 2019-08-14 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/ppc-auxv.h (PPC_FEATURE2_ARCH_3_1): New hwcap2 bit. (PPC_FEATURE2_MMA): New hwcap2 bit. * config/rs6000/rs6000-call.c (cpu_supports_info): Add arch 3.1 and mma bits. * config/rs6000/rs6000.c (rs6000_clone_map): Add 'future' system to target_clone support. [gcc/testsuite] 2019-08-14 Michael Meissner <meissner@linux.ibm.com> * gcc.target/powerpc/clone3.c: New test for using 'future' with the target_clones attribute.