diff mbox series

[Committed] S/390: Fix vec_sldw builtin

Message ID 20190517100842.28743-1-krebbel@linux.ibm.com
State New
Headers show
Series [Committed] S/390: Fix vec_sldw builtin | expand

Commit Message

Andreas Krebbel May 17, 2019, 10:08 a.m. UTC 
The builtin was wired up to the wrong pattern.  Fixed with this patch.

gcc/ChangeLog:

2019-05-17  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390-builtins.def (s390_vec_sldw_*): Use the
	vec_sldw insn pattern.

gcc/testsuite/ChangeLog:

2019-05-17  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/zvector/vec-sldw.c: New test.
---
 gcc/config/s390/s390-builtins.def             | 20 ++++---
 .../gcc.target/s390/zvector/vec-sldw.c        | 55 +++++++++++++++++++
 2 files changed, 66 insertions(+), 9 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-sldw.c
diff mbox series

Patch

diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index fbf7d9f50e8..cfc69651b0d 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -2079,15 +2079,17 @@  OB_DEF_VAR (s390_vec_sld_dbl,           s390_vsldb,         0,
 B_DEF      (s390_vsldb,                 vec_sldv16qi,       0,                  B_VX,               O3_U4,              BT_FN_UV16QI_UV16QI_UV16QI_INT)
 
 OB_DEF     (s390_vec_sldw,              s390_vec_sldw_s8,   s390_vec_sldw_dbl,  B_VX,               BT_FN_OV4SI_OV4SI_OV4SI_INT)
-OB_DEF_VAR (s390_vec_sldw_s8,           s390_vsldb,         0,                  O3_U4,              BT_OV_V16QI_V16QI_V16QI_INT)
-OB_DEF_VAR (s390_vec_sldw_u8,           s390_vsldb,         0,                  O3_U4,              BT_OV_UV16QI_UV16QI_UV16QI_INT)
-OB_DEF_VAR (s390_vec_sldw_s16,          s390_vsldb,         0,                  O3_U4,              BT_OV_V8HI_V8HI_V8HI_INT)
-OB_DEF_VAR (s390_vec_sldw_u16,          s390_vsldb,         0,                  O3_U4,              BT_OV_UV8HI_UV8HI_UV8HI_INT)
-OB_DEF_VAR (s390_vec_sldw_s32,          s390_vsldb,         0,                  O3_U4,              BT_OV_V4SI_V4SI_V4SI_INT)
-OB_DEF_VAR (s390_vec_sldw_u32,          s390_vsldb,         0,                  O3_U4,              BT_OV_UV4SI_UV4SI_UV4SI_INT)
-OB_DEF_VAR (s390_vec_sldw_s64,          s390_vsldb,         0,                  O3_U4,              BT_OV_V2DI_V2DI_V2DI_INT)
-OB_DEF_VAR (s390_vec_sldw_u64,          s390_vsldb,         0,                  O3_U4,              BT_OV_UV2DI_UV2DI_UV2DI_INT)
-OB_DEF_VAR (s390_vec_sldw_dbl,          s390_vsldb,         B_DEP,              O3_U4,              BT_OV_V2DF_V2DF_V2DF_INT)
+OB_DEF_VAR (s390_vec_sldw_s8,           s390_vsldw,         0,                  O3_U4,              BT_OV_V16QI_V16QI_V16QI_INT)
+OB_DEF_VAR (s390_vec_sldw_u8,           s390_vsldw,         0,                  O3_U4,              BT_OV_UV16QI_UV16QI_UV16QI_INT)
+OB_DEF_VAR (s390_vec_sldw_s16,          s390_vsldw,         0,                  O3_U4,              BT_OV_V8HI_V8HI_V8HI_INT)
+OB_DEF_VAR (s390_vec_sldw_u16,          s390_vsldw,         0,                  O3_U4,              BT_OV_UV8HI_UV8HI_UV8HI_INT)
+OB_DEF_VAR (s390_vec_sldw_s32,          s390_vsldw,         0,                  O3_U4,              BT_OV_V4SI_V4SI_V4SI_INT)
+OB_DEF_VAR (s390_vec_sldw_u32,          s390_vsldw,         0,                  O3_U4,              BT_OV_UV4SI_UV4SI_UV4SI_INT)
+OB_DEF_VAR (s390_vec_sldw_s64,          s390_vsldw,         0,                  O3_U4,              BT_OV_V2DI_V2DI_V2DI_INT)
+OB_DEF_VAR (s390_vec_sldw_u64,          s390_vsldw,         0,                  O3_U4,              BT_OV_UV2DI_UV2DI_UV2DI_INT)
+OB_DEF_VAR (s390_vec_sldw_dbl,          s390_vsldw,         B_DEP,              O3_U4,              BT_OV_V2DF_V2DF_V2DF_INT)
+
+B_DEF      (s390_vsldw,                 vec_sldwv16qi,      0,                  B_VX,               O3_U4,              BT_FN_UV16QI_UV16QI_UV16QI_INT)
 
 OB_DEF     (s390_vec_sral,              s390_vec_sral_u8q,  s390_vec_sral_b64s, B_VX,               BT_FN_OV4SI_OV4SI_OV4SI)
 OB_DEF_VAR (s390_vec_sral_u8q,          s390_vsra,          0,                  0,                  BT_OV_UV16QI_UV16QI_UV16QI)
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-sldw.c b/gcc/testsuite/gcc.target/s390/zvector/vec-sldw.c
new file mode 100644
index 00000000000..2d4b30f47ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-sldw.c
@@ -0,0 +1,55 @@ 
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -march=z13 -mzvector --save-temps" } */
+
+#include <vecintrin.h>
+
+vector signed char __attribute__((noinline,noclone))
+foo8 (vector signed char a)
+{
+  return vec_sldw (a, (vector signed char){ 0 }, 2);
+}
+
+vector signed short __attribute__((noinline,noclone))
+foo16 (vector signed short a)
+{
+  return vec_sldw (a, (vector signed short){ 0 }, 2);
+}
+
+vector int __attribute__((noinline,noclone))
+foo32 (vector int a)
+{
+  return vec_sldw (a, (vector int){ 0 }, 2);
+}
+
+vector long long __attribute__((noinline,noclone))
+foo64 (vector long long a)
+{
+  return vec_sldw (a, (vector long long){ 0 }, 2);
+}
+
+int
+main ()
+{
+  vector long long x;
+
+  x = (vector long long)foo8 ((vector signed char)
+	 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 });
+  if (x[0] != 0x08090a0b0c0d0e0fULL || x[1] != 0)
+    __builtin_abort ();
+
+  x = (vector long long)foo16 ((vector signed short){ 0, 1, 2, 3, 4, 5, 6, 7 });
+  if (x[0] != 0x0004000500060007ULL || x[1] != 0)
+    __builtin_abort ();
+
+  x = (vector long long)foo32 ((vector int){ 0, 1, 2, 3 });
+  if (x[0] != 0x0000000200000003ULL || x[1] != 0)
+    __builtin_abort ();
+
+  x = (vector long long)foo64 ((vector long long){ 0, 1 });
+  if (x[0] != 1 || x[1] != 0)
+    __builtin_abort ();
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler "vsldb\t%v24,%v24,%v\[0-9\]*,8" } } */