From patchwork Wed May 15 12:39:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 1100022 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-500777-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="H/RJr6nA"; dkim=pass (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="SzX42X1f"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 453vQb3rdBz9s9N for ; Wed, 15 May 2019 22:44:55 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=Ksj BH6zF0ztLjy1G/WCxx3gfMcY+7t4uwF9P1R7Bp1VLNN218IoI98IchB609RP55Eg abtm3pQy4HX4uWwN9gpQH7uD7MHutdZFHrEoirPRZqEo+nleCz6IrAinRgbQ6OUn NRWTd0cVEqA6jLYEOb0GDSk2gOaOTGw7LB7Dqsbg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; s=default; bh=FGtXdYw12 uJ8RZ2dLvOY4oVlN6g=; b=H/RJr6nARXY+6SuG8dSNufmAkpG+48EmyZXcAAZaF ildeBHbQ+o2OjchfWcCzfl9MBbW/eLMuKRz64GBwrwSn8p2bLheV8Titdl0iHsAa g/5aIoiUTnWksq0wxhRJdF2SWGnExj1T7JL95HJ/3WCuAnChTOdRmOKnGOfR/bqi CI= Received: (qmail 114505 invoked by alias); 15 May 2019 12:44:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 92625 invoked by uid 89); 15 May 2019 12:44:41 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Languages-Length:1096 X-HELO: mx07-00178001.pphosted.com Received: from mx07-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (62.209.51.94) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 15 May 2019 12:44:40 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4FCg5Xi010209 for ; Wed, 15 May 2019 14:44:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=STMicroelectronics; bh=H1jZapv2WhcVQfBCxV/7hQs0GZZ9dET1LJnUNzUzBJQ=; b=SzX42X1fLO/L/s2UuO5ALZ/QPG8bl/Ttk9Lmuta1E9wxR+OFedZxtihwsfjionnF0AYS ifz3yD7+wk3cNdY4P3tYmWt0Hg1tccj2fh78a4wVmfnovCuuB6Fa0r1DA00dL+cdK2Hl NkxH0Z0jrh/NoMxAMPtUwjDKa7UFw06Xfqjk/kgIMhB10NAmE7RvP0Q1vCz02kVZpNQy bDhyC4GRY9btJBRvVZFB9B1Cs6xVaeaOfzrzd3Nm8V0YfKn0pFUDHU0++vp7lSCZJ84T +dQ2cVPOTpbg9LLbfKF6HIzBhTNzPHLRzXX2jB+sq6dkYRJROR8RT5ueyhVotJGLqjpW vQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2sg0an6bh6-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Wed, 15 May 2019 14:44:38 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CE36631 for ; Wed, 15 May 2019 12:44:37 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BEC042761 for ; Wed, 15 May 2019 12:44:37 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 15 May 2019 14:44:37 +0200 From: Christophe Lyon To: Subject: [ARM/FDPIC v5 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Date: Wed, 15 May 2019 14:39:38 +0200 Message-ID: <20190515124006.25840-14-christophe.lyon@st.com> In-Reply-To: <20190515124006.25840-1-christophe.lyon@st.com> References: <20190515124006.25840-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes Without this, when we are unwinding across a signal frame we can jump to an even address which leads to an exception. This is needed in __gnu_persnality_sigframe_fdpic() when restoring the PC from the signal frame since the PC saved by the kernel has the LSB bit set to zero. 2019-XX-XX Christophe Lyon Mickaël Guêné libgcc/ * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m architecture. Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c index 9ba73e7..ba47150 100644 --- a/libgcc/config/arm/unwind-arm.c +++ b/libgcc/config/arm/unwind-arm.c @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context, return _UVRSR_FAILED; vrs->core.r[regno] = *(_uw *) valuep; +#if defined(__ARM_ARCH_7M__) + /* Force LSB bit since we always run thumb code. */ + if (regno == 15) + vrs->core.r[regno] |= 1; +#endif return _UVRSR_OK; case _UVRSC_VFP: