diff mbox series

[committed] Fix ARM ICE on glibc (PR target/89434)

Message ID 20190228131834.GD7611@tucnak
State New
Headers show
Series [committed] Fix ARM ICE on glibc (PR target/89434) | expand

Commit Message

Jakub Jelinek Feb. 28, 2019, 1:18 p.m. UTC 
Hi!

0x80000000 (in RTL (const_int 0xffffffff80000000)) is valid the "I"
constraint and should be allowed for sbcs, but because HOST_WIDE_INT
is 64-bit, UINTVAL (operands[2]) == -UINTVAL (operands[3]) is actually
not true for that.

Fixed thusly, bootstrapped/regtested on armv7hl-linux-gnueabi, preapproved
in the PR by Kyrill, committed to trunk.  Sorry for the breakage.

Note, using UINTVAL actually isn't necessary, I used it for the fear that
there might be UB in the compiler, but because these values must be valid
SImode CONST_INTs and -INTVAL is only UB for 0x8000000000000000 which
is not a valid SImode CONST_INT, we don't need to negate in unsigned type.

2019-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR target/89434
	* config/arm/arm.md (*subsi3_carryin_compare_const): Use
	trunc_int_for_mode (-INTVAL (...), SImode), just instead of
	-UINTVAL (...).


	Jakub
diff mbox series

Patch

--- gcc/config/arm/arm.md.jj	2019-02-25 11:32:02.914684615 +0100
+++ gcc/config/arm/arm.md	2019-02-26 14:41:41.128767480 +0100
@@ -1185,7 +1187,9 @@  (define_insn "*subsi3_carryin_compare_co
         (minus:SI (plus:SI (match_dup 1)
                            (match_operand:SI 3 "arm_neg_immediate_operand" "L"))
                   (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
-  "TARGET_32BIT && UINTVAL (operands[2]) == -UINTVAL (operands[3])"
+  "TARGET_32BIT
+   && (INTVAL (operands[2])
+       == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
   "sbcs\\t%0, %1, #%n3"
   [(set_attr "conds" "set")
    (set_attr "type" "adcs_imm")]