Message ID | 20190220211218.GK2135@tucnak |
---|---|
State | New |
Headers | show |
Series | [arm] Fix 88714, Arm LDRD/STRD peepholes - remove q constraint | expand |
On 2/20/19 9:12 PM, Jakub Jelinek wrote: > On Mon, Feb 18, 2019 at 12:47:04PM +0000, Kyrill Tkachov wrote: >> Ok. >> >> Thanks for working on this. > Sorry for the endless story here, but I've realized that the *arm_ldrd and > *arm_strd instructions are the only remaining uses of the undocumented > internal constraint q and that it isn't really needed even for these > instructions, we can just use rk instead of q. > > Bootstrapped/regtested on armv7hl-linux-gnueabi, ok for trunk? Ok. Thanks, Kyrill > 2019-02-20 Jakub Jelinek <jakub@redhat.com> > > PR bootstrap/88714 > * constraints.md (q): Remove. > * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint > instead of q. > > --- gcc/config/arm/constraints.md.jj 2019-01-01 12:37:27.032812929 +0100 > +++ gcc/config/arm/constraints.md 2019-02-18 20:18:51.816941795 +0100 > @@ -90,9 +90,6 @@ (define_constraint "PJ" > (define_register_constraint "k" "STACK_REG" > "@internal The stack register.") > > -(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS" > - "@internal In ARM state with LDRD support, core registers, otherwise general registers.") > - > (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS" > "@internal > Thumb only. The union of the low registers and the stack register.") > --- gcc/config/arm/ldrdstrd.md.jj 2019-02-18 20:19:34.976233961 +0100 > +++ gcc/config/arm/ldrdstrd.md 2019-02-18 20:19:54.555912842 +0100 > @@ -159,7 +159,7 @@ (define_peephole2 ; swap the destination > (define_insn "*arm_ldrd" > [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r") > (match_operand:SI 2 "memory_operand" "m")) > - (set (match_operand:SI 1 "s_register_operand" "=q") > + (set (match_operand:SI 1 "s_register_operand" "=rk") > (match_operand:SI 3 "memory_operand" "m"))])] > "TARGET_LDRD && TARGET_ARM && reload_completed > && valid_operands_ldrd_strd (operands, true)" > @@ -180,7 +180,7 @@ (define_insn "*arm_strd" > [(parallel [(set (match_operand:SI 2 "memory_operand" "=m") > (match_operand:SI 0 "s_register_operand" "r")) > (set (match_operand:SI 3 "memory_operand" "=m") > - (match_operand:SI 1 "s_register_operand" "q"))])] > + (match_operand:SI 1 "s_register_operand" "rk"))])] > "TARGET_LDRD && TARGET_ARM && reload_completed > && valid_operands_ldrd_strd (operands, false)" > { > > > Jakub
--- gcc/config/arm/constraints.md.jj 2019-01-01 12:37:27.032812929 +0100 +++ gcc/config/arm/constraints.md 2019-02-18 20:18:51.816941795 +0100 @@ -90,9 +90,6 @@ (define_constraint "PJ" (define_register_constraint "k" "STACK_REG" "@internal The stack register.") -(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS" - "@internal In ARM state with LDRD support, core registers, otherwise general registers.") - (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS" "@internal Thumb only. The union of the low registers and the stack register.") --- gcc/config/arm/ldrdstrd.md.jj 2019-02-18 20:19:34.976233961 +0100 +++ gcc/config/arm/ldrdstrd.md 2019-02-18 20:19:54.555912842 +0100 @@ -159,7 +159,7 @@ (define_peephole2 ; swap the destination (define_insn "*arm_ldrd" [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r") (match_operand:SI 2 "memory_operand" "m")) - (set (match_operand:SI 1 "s_register_operand" "=q") + (set (match_operand:SI 1 "s_register_operand" "=rk") (match_operand:SI 3 "memory_operand" "m"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, true)" @@ -180,7 +180,7 @@ (define_insn "*arm_strd" [(parallel [(set (match_operand:SI 2 "memory_operand" "=m") (match_operand:SI 0 "s_register_operand" "r")) (set (match_operand:SI 3 "memory_operand" "=m") - (match_operand:SI 1 "s_register_operand" "q"))])] + (match_operand:SI 1 "s_register_operand" "rk"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, false)" {