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[73.93.86.59]) by smtp.gmail.com with ESMTPSA id k65sm14269933pge.74.2019.02.18.10.44.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Feb 2019 10:44:13 -0800 (PST) Received: from gnu-cfl-2.hsd1.ca.comcast.net (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 7B394C0355; Mon, 18 Feb 2019 10:36:58 -0800 (PST) From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: [PATCH 22/41] i386: Emulate MMX mmx_uavgv8qi3 with SSE Date: Mon, 18 Feb 2019 10:36:38 -0800 Message-Id: <20190218183657.16296-23-hjl.tools@gmail.com> In-Reply-To: <20190218183657.16296-1-hjl.tools@gmail.com> References: <20190218183657.16296-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-IsSubscribed: yes Emulate MMX mmx_uavgv8qi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_uavgv8qi3): Add SSE emulation. --- gcc/config/i386/mmx.md | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 5a342256cbc..8866354dea9 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1679,50 +1679,55 @@ (plus:V8HI (plus:V8HI (zero_extend:V8HI - (match_operand:V8QI 1 "nonimmediate_operand")) + (match_operand:V8QI 1 "register_mmxmem_operand")) (zero_extend:V8HI - (match_operand:V8QI 2 "nonimmediate_operand"))) + (match_operand:V8QI 2 "register_mmxmem_operand"))) (const_vector:V8HI [(const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1)])) (const_int 1))))] - "TARGET_SSE || TARGET_3DNOW" + "(TARGET_MMX || TARGET_MMX_WITH_SSE) + && (TARGET_SSE || TARGET_3DNOW_A)" "ix86_fixup_binary_operands_no_copy (PLUS, V8QImode, operands);") (define_insn "*mmx_uavgv8qi3" - [(set (match_operand:V8QI 0 "register_operand" "=y") + [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv") (truncate:V8QI (lshiftrt:V8HI (plus:V8HI (plus:V8HI (zero_extend:V8HI - (match_operand:V8QI 1 "nonimmediate_operand" "%0")) + (match_operand:V8QI 1 "register_mmxmem_operand" "%0,0,Yv")) (zero_extend:V8HI - (match_operand:V8QI 2 "nonimmediate_operand" "ym"))) + (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv"))) (const_vector:V8HI [(const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1) (const_int 1)])) (const_int 1))))] - "(TARGET_SSE || TARGET_3DNOW) + "(TARGET_MMX || TARGET_MMX_WITH_SSE) + && (TARGET_SSE || TARGET_3DNOW_A) && ix86_binary_operator_ok (PLUS, V8QImode, operands)" { /* These two instructions have the same operation, but their encoding is different. Prefer the one that is de facto standard. */ - if (TARGET_SSE || TARGET_3DNOW_A) + if (TARGET_MMX_WITH_SSE && TARGET_AVX) + return "vpavgb\t{%2, %1, %0|%0, %1, %2}"; + else if (TARGET_SSE || TARGET_3DNOW_A) return "pavgb\t{%2, %0|%0, %2}"; else return "pavgusb\t{%2, %0|%0, %2}"; } - [(set_attr "type" "mmxshft") + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") + (set_attr "type" "mmxshft,sseiadd,sseiadd") (set (attr "prefix_extra") (if_then_else (not (ior (match_test "TARGET_SSE") (match_test "TARGET_3DNOW_A"))) (const_string "1") (const_string "*"))) - (set_attr "mode" "DI")]) + (set_attr "mode" "DI,TI,TI")]) (define_expand "mmx_uavgv4hi3" [(set (match_operand:V4HI 0 "register_operand")