| Message ID | 20190210001947.27278-12-hjl.tools@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | V3: Emulate MMX intrinsics with SSE | expand |
On 2/10/19, H.J. Lu <hjl.tools@gmail.com> wrote: > Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE. Only SSE register source > operand is allowed. > > PR target/89021 > * config/i386/mmx.md (mmx_eq<mode>3): Also allow > TARGET_MMX_WITH_SSE. > (*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE > support. > (mmx_gt<mode>3): Likewise. OK. Uros. > --- > gcc/config/i386/mmx.md | 39 ++++++++++++++++++++++++--------------- > 1 file changed, 24 insertions(+), 15 deletions(-) > > diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md > index 8945ece2a03..d360e97c98b 100644 > --- a/gcc/config/i386/mmx.md > +++ b/gcc/config/i386/mmx.md > @@ -1063,28 +1063,37 @@ > (eq:MMXMODEI > (match_operand:MMXMODEI 1 "nonimmediate_operand") > (match_operand:MMXMODEI 2 "nonimmediate_operand")))] > - "TARGET_MMX" > + "TARGET_MMX || TARGET_MMX_WITH_SSE" > "ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);") > > (define_insn "*mmx_eq<mode>3" > - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") > + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv") > (eq:MMXMODEI > - (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0") > - (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))] > - "TARGET_MMX && ix86_binary_operator_ok (EQ, <MODE>mode, operands)" > - "pcmpeq<mmxvecsize>\t{%2, %0|%0, %2}" > - [(set_attr "type" "mmxcmp") > - (set_attr "mode" "DI")]) > + (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0,0,Yv") > + (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym,x,Yv")))] > + "(TARGET_MMX || TARGET_MMX_WITH_SSE) > + && ix86_binary_operator_ok (EQ, <MODE>mode, operands)" > + "@ > + pcmpeq<mmxvecsize>\t{%2, %0|%0, %2} > + pcmpeq<mmxvecsize>\t{%2, %0|%0, %2} > + vpcmpeq<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}" > + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") > + (set_attr "type" "mmxcmp,ssecmp,ssecmp") > + (set_attr "mode" "DI,TI,TI")]) > > (define_insn "mmx_gt<mode>3" > - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") > + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv") > (gt:MMXMODEI > - (match_operand:MMXMODEI 1 "register_operand" "0") > - (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))] > - "TARGET_MMX" > - "pcmpgt<mmxvecsize>\t{%2, %0|%0, %2}" > - [(set_attr "type" "mmxcmp") > - (set_attr "mode" "DI")]) > + (match_operand:MMXMODEI 1 "register_operand" "0,0,Yv") > + (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym,x,Yv")))] > + "TARGET_MMX || TARGET_MMX_WITH_SSE" > + "@ > + pcmpgt<mmxvecsize>\t{%2, %0|%0, %2} > + pcmpgt<mmxvecsize>\t{%2, %0|%0, %2} > + vpcmpgt<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}" > + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") > + (set_attr "type" "mmxcmp,ssecmp,ssecmp") > + (set_attr "mode" "DI,TI,TI")]) > > ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; > ;; > -- > 2.20.1 > >
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 8945ece2a03..d360e97c98b 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1063,28 +1063,37 @@ (eq:MMXMODEI (match_operand:MMXMODEI 1 "nonimmediate_operand") (match_operand:MMXMODEI 2 "nonimmediate_operand")))] - "TARGET_MMX" + "TARGET_MMX || TARGET_MMX_WITH_SSE" "ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);") (define_insn "*mmx_eq<mode>3" - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv") (eq:MMXMODEI - (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0") - (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))] - "TARGET_MMX && ix86_binary_operator_ok (EQ, <MODE>mode, operands)" - "pcmpeq<mmxvecsize>\t{%2, %0|%0, %2}" - [(set_attr "type" "mmxcmp") - (set_attr "mode" "DI")]) + (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0,0,Yv") + (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym,x,Yv")))] + "(TARGET_MMX || TARGET_MMX_WITH_SSE) + && ix86_binary_operator_ok (EQ, <MODE>mode, operands)" + "@ + pcmpeq<mmxvecsize>\t{%2, %0|%0, %2} + pcmpeq<mmxvecsize>\t{%2, %0|%0, %2} + vpcmpeq<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") + (set_attr "type" "mmxcmp,ssecmp,ssecmp") + (set_attr "mode" "DI,TI,TI")]) (define_insn "mmx_gt<mode>3" - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv") (gt:MMXMODEI - (match_operand:MMXMODEI 1 "register_operand" "0") - (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))] - "TARGET_MMX" - "pcmpgt<mmxvecsize>\t{%2, %0|%0, %2}" - [(set_attr "type" "mmxcmp") - (set_attr "mode" "DI")]) + (match_operand:MMXMODEI 1 "register_operand" "0,0,Yv") + (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym,x,Yv")))] + "TARGET_MMX || TARGET_MMX_WITH_SSE" + "@ + pcmpgt<mmxvecsize>\t{%2, %0|%0, %2} + pcmpgt<mmxvecsize>\t{%2, %0|%0, %2} + vpcmpgt<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") + (set_attr "type" "mmxcmp,ssecmp,ssecmp") + (set_attr "mode" "DI,TI,TI")]) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;