From patchwork Fri Feb 1 21:17:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1035196 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-495140-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="hrCOWhcf"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43rqrX6mTyz9sBZ for ; Sat, 2 Feb 2019 08:25:16 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; q=dns; s=default; b=bmn ZHp9spn006GTPy/MJ2U1WEVNujrlFjICh40yiIrPwyTnM1DXXkEPF19g3FaYd8tc wZLX5s5Opo+U+ZKQ120NEfCh7gsXxIQOa5yPRHiLT99DHsaurWsb8uWaLD/rXonK RyJiyet0Et/Qo0s+Fz8CJDiLl/CtfHo6f1shU/GA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=default; bh=Y6MDJuVLG 6rhCiAZrvHtZbP8HwI=; b=hrCOWhcfcD25niaLcTwmi64zNpBOZoEFW1DmfEyYj koOrRodGny1Gl1bDm352cJXpsLmXdTblRD6eiwkNT6TYH87F9kB6Cq8+HS8vBgbN lVk19nhhvjpBC3VZsW+hNtVfwL9BEqoXrPbF++jPAUhT2rUjdw4B5TQHn/+8AqBD pw= Received: (qmail 100345 invoked by alias); 1 Feb 2019 21:18:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 97934 invoked by uid 89); 1 Feb 2019 21:18:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.2 required=5.0 tests=BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=HContent-Transfer-Encoding:8bit X-HELO: mga05.intel.com Received: from mga05.intel.com (HELO mga05.intel.com) (192.55.52.43) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 01 Feb 2019 21:18:26 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Feb 2019 13:18:10 -0800 Received: from gnu-cfl-1.sc.intel.com ([172.25.70.237]) by fmsmga002.fm.intel.com with ESMTP; 01 Feb 2019 13:18:10 -0800 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: [PATCH 35/46] i386: Emulate MMX ssse3_psign3 with SSE Date: Fri, 1 Feb 2019 13:17:58 -0800 Message-Id: <20190201211809.963-36-hjl.tools@gmail.com> In-Reply-To: <20190201211809.963-1-hjl.tools@gmail.com> References: <20190201211809.963-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-IsSubscribed: yes Emulate MMX ssse3_psign3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_psign3): Add SSE emulation. --- gcc/config/i386/sse.md | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f932369c740..6cad298eb86 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -15898,17 +15898,21 @@ (set_attr "mode" "")]) (define_insn "ssse3_psign3" - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,Yx,Yy") (unspec:MMXMODEI - [(match_operand:MMXMODEI 1 "register_operand" "0") - (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")] + [(match_operand:MMXMODEI 1 "register_operand" "0,0,Yy") + (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym,Yx,Yy")] UNSPEC_PSIGN))] "TARGET_SSSE3" - "psign\t{%2, %0|%0, %2}"; - [(set_attr "type" "sselog1") + "@ + psign\t{%2, %0|%0, %2} + psign\t{%2, %0|%0, %2} + vpsign\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "isa" "*,noavx,avx") + (set_attr "type" "sselog1") (set_attr "prefix_extra" "1") (set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)")) - (set_attr "mode" "DI")]) + (set_attr "mode" "DI,TI,TI")]) (define_insn "_palignr_mask" [(set (match_operand:VI1_AVX512 0 "register_operand" "=v")