diff mbox series

Change AVX512 gathers/scatters to not print *WORD PTR in -masm=intel mode (PR target/88522)

Message ID 20181221150432.GG23305@tucnak
State New
Headers show
Series Change AVX512 gathers/scatters to not print *WORD PTR in -masm=intel mode (PR target/88522) | expand

Commit Message

Jakub Jelinek Dec. 21, 2018, 3:04 p.m. UTC
Hi!

Binutils recently changed the expected *WORD PTR sizes for AVX512
scatter/gather insns incompatibly.

If we want to stay compatible with both old and new gas, we need to
avoid printing that *WORD PTR.

Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux
(though just with gas 2.29).  Ok for trunk?

2018-12-21  Jakub Jelinek  <jakub@redhat.com>

	PR target/88522
	* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask,
	*avx512pf_gatherpf<mode>df_mask, *avx512pf_scatterpf<mode>sf_mask,
	*avx512pf_scatterpf<mode>df_mask): Use %X5 instead of %5 for
	-masm=intel.
	(gatherq_mode): Remove mode iterator.
	(*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2): Use X instead
	of <xtg_mode>.
	(*avx512f_gatherdi<mode>): Use X instead of <gatherq_mode>.
	(*avx512f_gatherdi<mode>_2, *avx512f_scattersi<mode>,
	*avx512f_scatterdi<mode>): Use %X5 for -masm=intel.


	Jakub

Comments

Uros Bizjak Dec. 21, 2018, 3:21 p.m. UTC | #1
On Fri, Dec 21, 2018 at 4:04 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> Binutils recently changed the expected *WORD PTR sizes for AVX512
> scatter/gather insns incompatibly.
>
> If we want to stay compatible with both old and new gas, we need to
> avoid printing that *WORD PTR.

 Please add a comment, why we avoid PTR, and why X modifier is used.

> Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux
> (though just with gas 2.29).  Ok for trunk?
>
> 2018-12-21  Jakub Jelinek  <jakub@redhat.com>
>
>         PR target/88522
>         * config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask,
>         *avx512pf_gatherpf<mode>df_mask, *avx512pf_scatterpf<mode>sf_mask,
>         *avx512pf_scatterpf<mode>df_mask): Use %X5 instead of %5 for
>         -masm=intel.
>         (gatherq_mode): Remove mode iterator.
>         (*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2): Use X instead
>         of <xtg_mode>.
>         (*avx512f_gatherdi<mode>): Use X instead of <gatherq_mode>.
>         (*avx512f_gatherdi<mode>_2, *avx512f_scattersi<mode>,
>         *avx512f_scatterdi<mode>): Use %X5 for -masm=intel.

OK with the above comment addition.

Thanks,
Uros.

> --- gcc/config/i386/sse.md.jj   2018-12-18 12:20:53.519482252 +0100
> +++ gcc/config/i386/sse.md      2018-12-21 10:44:34.614068251 +0100
> @@ -17269,9 +17269,9 @@ (define_insn "*avx512pf_gatherpf<mode>sf
>    switch (INTVAL (operands[4]))
>      {
>      case 3:
> -      return "vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
> +      return "vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
>      case 2:
> -      return "vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
> +      return "vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
>      default:
>        gcc_unreachable ();
>      }
> @@ -17314,9 +17314,9 @@ (define_insn "*avx512pf_gatherpf<mode>df
>    switch (INTVAL (operands[4]))
>      {
>      case 3:
> -      return "vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
> +      return "vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
>      case 2:
> -      return "vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
> +      return "vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
>      default:
>        gcc_unreachable ();
>      }
> @@ -17360,10 +17360,10 @@ (define_insn "*avx512pf_scatterpf<mode>s
>      {
>      case 3:
>      case 7:
> -      return "vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
> +      return "vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
>      case 2:
>      case 6:
> -      return "vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
> +      return "vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
>      default:
>        gcc_unreachable ();
>      }
> @@ -17407,10 +17407,10 @@ (define_insn "*avx512pf_scatterpf<mode>d
>      {
>      case 3:
>      case 7:
> -      return "vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
> +      return "vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
>      case 2:
>      case 6:
> -      return "vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
> +      return "vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
>      default:
>        gcc_unreachable ();
>      }
> @@ -20290,12 +20290,6 @@ (define_insn "*avx2_gatherdi<mode>_4"
>     (set_attr "prefix" "vex")
>     (set_attr "mode" "<sseinsnmode>")])
>
> -;; Memory operand override for -masm=intel of the v*gatherq* patterns.
> -(define_mode_attr gatherq_mode
> -  [(V4SI "q") (V2DI "x") (V4SF "q") (V2DF "x")
> -   (V8SI "x") (V4DI "t") (V8SF "x") (V4DF "t")
> -   (V16SI "t") (V8DI "g") (V16SF "t") (V8DF "g")])
> -
>  (define_expand "<avx512>_gathersi<mode>"
>    [(parallel [(set (match_operand:VI48F 0 "register_operand")
>                    (unspec:VI48F
> @@ -20329,7 +20323,7 @@ (define_insn "*avx512f_gathersi<mode>"
>           UNSPEC_GATHER))
>     (clobber (match_scratch:<avx512fmaskmode> 2 "=&Yk"))]
>    "TARGET_AVX512F"
> -  "v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %<xtg_mode>6}"
> +  "v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %X6}"
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
>     (set_attr "mode" "<sseinsnmode>")])
> @@ -20348,7 +20342,7 @@ (define_insn "*avx512f_gathersi<mode>_2"
>           UNSPEC_GATHER))
>     (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
>    "TARGET_AVX512F"
> -  "v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %<xtg_mode>5}"
> +  "v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}"
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
>     (set_attr "mode" "<sseinsnmode>")])
> @@ -20388,7 +20382,7 @@ (define_insn "*avx512f_gatherdi<mode>"
>     (clobber (match_scratch:QI 2 "=&Yk"))]
>    "TARGET_AVX512F"
>  {
> -  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %<gatherq_mode>6}";
> +  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %X6}";
>  }
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
> @@ -20412,11 +20406,11 @@ (define_insn "*avx512f_gatherdi<mode>_2"
>    if (<MODE>mode != <VEC_GATHER_SRCDI>mode)
>      {
>        if (<MODE_SIZE> != 64)
> -       return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %<gatherq_mode>5}";
> +       return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %X5}";
>        else
> -       return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %t5}";
> +       return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %X5}";
>      }
> -  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %<gatherq_mode>5}";
> +  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}";
>  }
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
> @@ -20453,7 +20447,7 @@ (define_insn "*avx512f_scattersi<mode>"
>           UNSPEC_SCATTER))
>     (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
>    "TARGET_AVX512F"
> -  "v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}"
> +  "v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
>     (set_attr "mode" "<sseinsnmode>")])
> @@ -20489,11 +20483,7 @@ (define_insn "*avx512f_scatterdi<mode>"
>           UNSPEC_SCATTER))
>     (clobber (match_scratch:QI 1 "=&Yk"))]
>    "TARGET_AVX512F"
> -{
> -  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 8)
> -    return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}";
> -  return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%t5%{%1%}, %3}";
> -}
> +  "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
>    [(set_attr "type" "ssemov")
>     (set_attr "prefix" "evex")
>     (set_attr "mode" "<sseinsnmode>")])
>
>         Jakub
diff mbox series

Patch

--- gcc/config/i386/sse.md.jj	2018-12-18 12:20:53.519482252 +0100
+++ gcc/config/i386/sse.md	2018-12-21 10:44:34.614068251 +0100
@@ -17269,9 +17269,9 @@  (define_insn "*avx512pf_gatherpf<mode>sf
   switch (INTVAL (operands[4]))
     {
     case 3:
-      return "vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
+      return "vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
     case 2:
-      return "vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
+      return "vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
     default:
       gcc_unreachable ();
     }
@@ -17314,9 +17314,9 @@  (define_insn "*avx512pf_gatherpf<mode>df
   switch (INTVAL (operands[4]))
     {
     case 3:
-      return "vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
+      return "vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
     case 2:
-      return "vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
+      return "vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
     default:
       gcc_unreachable ();
     }
@@ -17360,10 +17360,10 @@  (define_insn "*avx512pf_scatterpf<mode>s
     {
     case 3:
     case 7:
-      return "vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
+      return "vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
     case 2:
     case 6:
-      return "vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%5%{%0%}}";
+      return "vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
     default:
       gcc_unreachable ();
     }
@@ -17407,10 +17407,10 @@  (define_insn "*avx512pf_scatterpf<mode>d
     {
     case 3:
     case 7:
-      return "vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
+      return "vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
     case 2:
     case 6:
-      return "vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%5%{%0%}}";
+      return "vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
     default:
       gcc_unreachable ();
     }
@@ -20290,12 +20290,6 @@  (define_insn "*avx2_gatherdi<mode>_4"
    (set_attr "prefix" "vex")
    (set_attr "mode" "<sseinsnmode>")])
 
-;; Memory operand override for -masm=intel of the v*gatherq* patterns.
-(define_mode_attr gatherq_mode
-  [(V4SI "q") (V2DI "x") (V4SF "q") (V2DF "x")
-   (V8SI "x") (V4DI "t") (V8SF "x") (V4DF "t")
-   (V16SI "t") (V8DI "g") (V16SF "t") (V8DF "g")])
-
 (define_expand "<avx512>_gathersi<mode>"
   [(parallel [(set (match_operand:VI48F 0 "register_operand")
 		   (unspec:VI48F
@@ -20329,7 +20323,7 @@  (define_insn "*avx512f_gathersi<mode>"
 	  UNSPEC_GATHER))
    (clobber (match_scratch:<avx512fmaskmode> 2 "=&Yk"))]
   "TARGET_AVX512F"
-  "v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %<xtg_mode>6}"
+  "v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %X6}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -20348,7 +20342,7 @@  (define_insn "*avx512f_gathersi<mode>_2"
 	  UNSPEC_GATHER))
    (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
   "TARGET_AVX512F"
-  "v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %<xtg_mode>5}"
+  "v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -20388,7 +20382,7 @@  (define_insn "*avx512f_gatherdi<mode>"
    (clobber (match_scratch:QI 2 "=&Yk"))]
   "TARGET_AVX512F"
 {
-  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %<gatherq_mode>6}";
+  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %X6}";
 }
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
@@ -20412,11 +20406,11 @@  (define_insn "*avx512f_gatherdi<mode>_2"
   if (<MODE>mode != <VEC_GATHER_SRCDI>mode)
     {
       if (<MODE_SIZE> != 64)
-	return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %<gatherq_mode>5}";
+	return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %X5}";
       else
-	return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %t5}";
+	return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %X5}";
     }
-  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %<gatherq_mode>5}";
+  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}";
 }
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
@@ -20453,7 +20447,7 @@  (define_insn "*avx512f_scattersi<mode>"
 	  UNSPEC_SCATTER))
    (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
   "TARGET_AVX512F"
-  "v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}"
+  "v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -20489,11 +20483,7 @@  (define_insn "*avx512f_scatterdi<mode>"
 	  UNSPEC_SCATTER))
    (clobber (match_scratch:QI 1 "=&Yk"))]
   "TARGET_AVX512F"
-{
-  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 8)
-    return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}";
-  return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%t5%{%1%}, %3}";
-}
+  "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])