From patchwork Wed Nov 14 13:07:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Dapp X-Patchwork-Id: 997726 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-490049-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="NcWuV9rj"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42w4Yh15ftz9s8J for ; Thu, 15 Nov 2018 00:08:23 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:message-id; q=dns; s= default; b=PN2CcS5feVl0Bx3cIANhhlWWmhTo5zpAY8njZ7BWEFM6o/6ZNSnoA WfBVpe2XwKNJ22Dkh5tB2NdkmQHyP1hZ+xtXT/lPtcS35EEwUp+WovCtfmwKVAjN Ux9hojzGBmvdw2P40mwwDzCspW4rO4YeplYPh11aE6TvCLTv1kvAYU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:message-id; s= default; bh=e4DskSaBqt8miqfqtpMKzlX66fk=; b=NcWuV9rjWhRC4ZwE41vM pC5jUbXzahIGu29hRXYOqt6WjsD0HzuHXqo4+8P9Onis50HjC41jgDFJ/4yL1qy0 zbmB9v1oa4/6DZ/bimeH+yNPtlIs8Pnpjt2jlrmU3sVe5n5C7oa9lnIs3pso9hBS g1OqLeiELm0uy0lm25qM5SQ= Received: (qmail 83657 invoked by alias); 14 Nov 2018 13:08:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 83413 invoked by uid 89); 14 Nov 2018 13:08:05 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=temp, rdapp@linux.ibm.com, sk:rdappl, U*rdapp X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 14 Nov 2018 13:08:03 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wAED4JAa084300 for ; Wed, 14 Nov 2018 08:08:02 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0a-001b2d01.pphosted.com with ESMTP id 2nrjh0dmtq-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 14 Nov 2018 08:08:01 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 14 Nov 2018 13:07:57 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wAED7tBL60424418 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Nov 2018 13:07:55 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F0964C040; Wed, 14 Nov 2018 13:07:55 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 388B74C04E; Wed, 14 Nov 2018 13:07:55 +0000 (GMT) Received: from oc6142347168.ibm.com (unknown [9.152.222.44]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 14 Nov 2018 13:07:55 +0000 (GMT) From: Robin Dapp To: gcc-patches@gcc.gnu.org Cc: krebbel@linux.ibm.com, iii@linux.ibm.com Subject: [PATCH 2/6] ifcvt: Allow constants operands in noce_convert_multiple_sets. Date: Wed, 14 Nov 2018 14:07:48 +0100 In-Reply-To: <20181114130752.5057-1-rdapp@linux.ibm.com> References: <20181114130752.5057-1-rdapp@linux.ibm.com> x-cbid: 18111413-0008-0000-0000-00000292B230 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18111413-0009-0000-0000-000021FCC75F Message-Id: <20181114130752.5057-3-rdapp@linux.ibm.com> This patch checks whether the current target supports conditional moves with immediate then/else operands and allows noce_convert_multiple_sets to deal with constants subsequently. Also, minor refactoring is performed. --- gcc/ChangeLog: 2018-11-14 Robin Dapp * ifcvt.c (have_const_cmov): New function. (noce_convert_multiple_sets): Allow constants if supported. (bb_ok_for_noce_convert_multiple_sets): Likewise. (check_cond_move_block): Refactor. --- gcc/ifcvt.c | 46 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index ddf077fa051..660bb46eb1c 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -3077,6 +3077,27 @@ bb_valid_for_noce_process_p (basic_block test_bb, rtx cond, return false; } +/* Check if we have a movcc pattern that accepts constants as then/else + operand (op 2/3). */ +static bool +have_const_cmov (machine_mode mode) +{ + enum insn_code icode; + if ((icode = direct_optab_handler (movcc_optab, mode)) + != CODE_FOR_nothing) + { + if (insn_data[(int) icode].operand[2].predicate + && (insn_data[(int) icode].operand[2].predicate + (const1_rtx, insn_data[(int) icode].operand[2].mode))) + if (insn_data[(int) icode].operand[3].predicate + && (insn_data[(int) icode].operand[3].predicate + (const1_rtx, insn_data[(int) icode].operand[3].mode))) + return true; + } + + return false; +} + /* We have something like: if (x > y) @@ -3194,7 +3215,12 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI). Wrap the two cmove operands into subregs if appropriate to prevent that. */ - if (GET_MODE (new_val) != GET_MODE (temp)) + + /* Check if we can emit a cmove with constant operands. */ + bool allow_constants = have_const_cmov (GET_MODE (target)); + + if (!(allow_constants && CONST_INT_P (new_val)) + && GET_MODE (new_val) != GET_MODE (temp)) { machine_mode src_mode = GET_MODE (new_val); machine_mode dst_mode = GET_MODE (temp); @@ -3205,7 +3231,8 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) } new_val = lowpart_subreg (dst_mode, new_val, src_mode); } - if (GET_MODE (old_val) != GET_MODE (temp)) + if (!(allow_constants && CONST_INT_P (old_val)) + && GET_MODE (old_val) != GET_MODE (temp)) { machine_mode src_mode = GET_MODE (old_val); machine_mode dst_mode = GET_MODE (temp); @@ -3339,9 +3366,10 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb) if (!REG_P (dest)) return false; - if (!(REG_P (src) - || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) - && subreg_lowpart_p (src)))) + if (!((REG_P (src) + || (have_const_cmov (GET_MODE (dest)) && CONST_INT_P (src))) + || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) + && subreg_lowpart_p (src)))) return false; /* Destination must be appropriate for a conditional write. */ @@ -3689,7 +3717,7 @@ check_cond_move_block (basic_block bb, { rtx set, dest, src; - if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn)) + if (!active_insn_p (insn)) continue; set = single_set (insn); if (!set) @@ -3705,10 +3733,8 @@ check_cond_move_block (basic_block bb, if (!CONSTANT_P (src) && !register_operand (src, VOIDmode)) return FALSE; - if (side_effects_p (src) || side_effects_p (dest)) - return FALSE; - - if (may_trap_p (src) || may_trap_p (dest)) + /* Check for side effects and trapping. */ + if (!noce_operand_ok (src) || !noce_operand_ok (dest)) return FALSE; /* Don't try to handle this if the source register was