From patchwork Mon Nov 12 11:42:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Modra X-Patchwork-Id: 996359 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-489722-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="R8TPn2Wn"; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="dSrMTSIn"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42tplY4DmHz9s1x for ; Mon, 12 Nov 2018 22:42:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=HoGi83sif0kvolohXpOtsuOBXMpSbCvSUbt5Wy2C4FI3H3G0go fFXf1s1VnP8HQqnCdu09eY9OetcdUopfB6c/EHTPSrIUNIZ6Lvl2OlZIE290LJQ2 +hEllAhxX814QfaiYy58TbQHi6VmpfmIVj2lSqjW3sfqm+FApH13q4yjI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=b/9vNBf8MX9H3VrYecBmQuBBFBQ=; b=R8TPn2Wnh1AKO8KzUbxB hHzrwkjj/lJ388+aJMAA0XSCjsAf05bliTMti+5euR30szUsg+kqxhZpgFXa3gXQ 5QtS1idEc8u4GELG7blEiXmb4CtthU0X1Ypa048oaMrtyKwcfhQxz06zCCJY7OLs Uq4Tmoalhrf4bXTYxNZ03vI= Received: (qmail 41056 invoked by alias); 12 Nov 2018 11:42:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 41046 invoked by uid 89); 12 Nov 2018 11:42:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=aix, power9, HX-Received:981, HX-HELO:sk:mail-pg X-HELO: mail-pg1-f174.google.com Received: from mail-pg1-f174.google.com (HELO mail-pg1-f174.google.com) (209.85.215.174) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 12 Nov 2018 11:42:20 +0000 Received: by mail-pg1-f174.google.com with SMTP id z17-v6so3973185pgv.3 for ; Mon, 12 Nov 2018 03:42:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:mime-version:content-disposition :user-agent; bh=GI6ORNaRL/0uPG2fV8jplCXDBnaq0bKroGDoBvxgEbs=; b=dSrMTSInKFUXmg/wOlfeFZLNijwSrSAMv8uq3kaAf40mAXTmpvveEgN5eWvkaw+CTm Zy+nw8X/5DdqKYE1IZyR49h6/wwIIMAKK7EdqFIWla+C5+53axsCDrKaKjVP0RTMYhuS ZStHHL2on+LI0o80fBZlT4pYPOeZ1NqGDrSn/x1B4cgJ2+GJrZ+EuKC6bFeXKOV/2dtb dcHoSFVP5t5k9AaecI4r1omWi/FrWLbc+NkcZmic2afb0SDRt2SE61ToJDCdamH6LSG2 M2euqsuz9385TFaBwmraLgoFjG+OA6SpRnvFk5PcoP8RmibAEI7d7uaj+O2idLMOntfL fI/A== Received: from bubble.grove.modra.org ([58.175.241.133]) by smtp.gmail.com with ESMTPSA id x3sm9087928pgt.45.2018.11.12.03.42.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Nov 2018 03:42:17 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id C4BFA80539; Mon, 12 Nov 2018 22:12:13 +1030 (ACDT) Date: Mon, 12 Nov 2018 22:12:13 +1030 From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: Segher Boessenkool Subject: [RS6000] PowerPC -mcpu=native support Message-ID: <20181112114213.GF22752@bubble.grove.modra.org> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.4 (2018-02-28) X-IsSubscribed: yes The -mcpu=native support has bit-rotted a little, in particular the fallback when the native cpu couldn't be determined. This patch fixes the bit-rot and reorganizes ASM_CPU_SPEC so that it should be a little easier to keep the -mcpu=native data up to date. The patch also changes the fix for PR63177 (-mpower9-vector being passed by the user when the default is -mpower8) to also apply when -mcpu=powerpc64le and -mcpu=native is given. I'll note that the hack for PR63177 should probably be extended to lots of other options, if we're going to continue supporting all those sub-architecture options (-mpower9-vector, -mpower8-vector, -mcrypto, -mdirect-move, -mhtm, -mvsx and others) in the positive sense. I think those should have only been supported in their -mno- variants.. Bootstrapped etc. powerpc64le-linux. Note that there is a small change to the AIX default, with -maltivec now selecting -m970 for both with and without -maix64 whereas before you got -mppc64 for -maix64. That seems correct to me, an oversight likely due to handling -maix64 default cpu in the wrong place. * config/rs6000/aix71.h (ASM_SPEC): Don't select default -maix64 cpu here. (ASM_CPU_SPEC): Do so here. Rewrite using if .. else if .. specs form. Error on missing -mcpu case. * config/rs6000/driver-rs6000.c (asm_names <_AIX>): Update NULL case. (asm_names ): Add missing cpus. Update NULL case. Apply PR63177 fix for -mcpu=power8 and -mcpu=powerpc64le. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Rewrite using if .. else if .. specs form. Error on missing -mcpu case. Don't output duplicate -maltivec. Apply PR63177 fix for -mcpu=powerpc64le. diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h index 8150552ebf3..2398ed64baa 100644 --- a/gcc/config/rs6000/aix71.h +++ b/gcc/config/rs6000/aix71.h @@ -59,7 +59,7 @@ do { \ } while (0) #undef ASM_SPEC -#define ASM_SPEC "-u %{maix64:-a64 %{!mcpu*:-mppc64}} %(asm_cpu)" +#define ASM_SPEC "-u %{maix64:-a64} %(asm_cpu)" /* Common ASM definitions used by ASM_SPEC amongst the various targets for handling -mcpu=xxx switches. There is a parallel list in driver-rs6000.c to @@ -67,31 +67,29 @@ do { \ you make changes here, make them there also. */ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ -"%{!mcpu*: %{!maix64: \ - %{mpowerpc64: -mppc64} \ - %{maltivec: -m970} \ - %{!maltivec: %{!mpowerpc64: %(asm_default)}}}} \ -%{mcpu=native: %(asm_cpu_native)} \ -%{mcpu=power3: -m620} \ -%{mcpu=power4: -mpwr4} \ -%{mcpu=power5: -mpwr5} \ -%{mcpu=power5+: -mpwr5x} \ -%{mcpu=power6: -mpwr6} \ -%{mcpu=power6x: -mpwr6} \ -%{mcpu=power7: -mpwr7} \ -%{mcpu=power8: -mpwr8} \ -%{mcpu=power9: -mpwr9} \ -%{mcpu=powerpc: -mppc} \ -%{mcpu=rs64a: -mppc} \ -%{mcpu=603: -m603} \ -%{mcpu=603e: -m603} \ -%{mcpu=604: -m604} \ -%{mcpu=604e: -m604} \ -%{mcpu=620: -m620} \ -%{mcpu=630: -m620} \ -%{mcpu=970: -m970} \ -%{mcpu=G5: -m970} \ -%{mvsx: %{!mcpu*: -mpwr6}} \ +"%{mcpu=native: %(asm_cpu_native); \ + mcpu=power9: -mpwr9; \ + mcpu=power8: -mpwr8; \ + mcpu=power7: -mpwr7; \ + mcpu=power6x|mcpu=power6: -mpwr6; \ + mcpu=power5+: -mpwr5x; \ + mcpu=power5: -mpwr5; \ + mcpu=power4: -mpwr4; \ + mcpu=power3: -m620; \ + mcpu=powerpc: -mppc; \ + mcpu=rs64a: -mppc; \ + mcpu=603: -m603; \ + mcpu=603e: -m603; \ + mcpu=604: -m604; \ + mcpu=604e: -m604; \ + mcpu=620: -m620; \ + mcpu=630: -m620; \ + mcpu=970|mcpu=G5: -m970; \ + !mcpu*: %{mvsx: -mpwr6; \ + maltivec: -m970; \ + maix64|mpowerpc64: -mppc64; \ + : %(asm_default)}; \ + :%eMissing -mcpu option in ASM_SPEC_CPU?\n} \ -many" #undef ASM_DEFAULT_SPEC diff --git a/gcc/config/rs6000/driver-rs6000.c b/gcc/config/rs6000/driver-rs6000.c index 948888b4c79..0a48d46d658 100644 --- a/gcc/config/rs6000/driver-rs6000.c +++ b/gcc/config/rs6000/driver-rs6000.c @@ -459,10 +459,10 @@ static const struct asm_name asm_names[] = { { "970", "-m970" }, { "G5", "-m970" }, { NULL, "\ -%{!maix64: \ -%{mpowerpc64: -mppc64} \ -%{maltivec: -m970} \ -%{!maltivec: %{!mpowerpc64: %(asm_default)}}}" }, + %{mvsx: -mpwr6; \ + maltivec: -m970; \ + maix64|mpowerpc64: -mppc64; \ + : %(asm_default)}" }, #else { "cell", "-mcell" }, @@ -470,12 +470,14 @@ static const struct asm_name asm_names[] = { { "power4", "-mpower4" }, { "power5", "-mpower5" }, { "power5+", "-mpower5" }, - { "power6", "-mpower6 -maltivec" }, - { "power6x", "-mpower6 -maltivec" }, + { "power6", "-mpower6 %{!mvsx:%{!maltivec:-maltivec}}" }, + { "power6x", "-mpower6 %{!mvsx:%{!maltivec:-maltivec}}" }, { "power7", "-mpower7" }, - { "power8", "-mpower8" }, + { "power8", "%{mpower9-vector:-mpower9;:-mpower8}" }, { "power9", "-mpower9" }, + { "a2", "-ma2" }, { "powerpc", "-mppc" }, + { "powerpc64le", "%{mpower9-vector:-mpower9;:-mpower8}" }, { "rs64a", "-mppc64" }, { "401", "-mppc" }, { "403", "-m403" }, @@ -485,6 +487,8 @@ static const struct asm_name asm_names[] = { { "440fp", "-m440" }, { "464", "-m440" }, { "464fp", "-m440" }, + { "476", "-m476" }, + { "476fp", "-m476" }, { "505", "-mppc" }, { "601", "-m601" }, { "602", "-mppc" }, @@ -498,23 +502,29 @@ static const struct asm_name asm_names[] = { { "740", "-mppc" }, { "750", "-mppc" }, { "G3", "-mppc" }, - { "7400", "-mppc -maltivec" }, - { "7450", "-mppc -maltivec" }, - { "G4", "-mppc -maltivec" }, + { "7400", "-mppc %{!mvsx:%{!maltivec:-maltivec}}" }, + { "7450", "-mppc %{!mvsx:%{!maltivec:-maltivec}}" }, + { "G4", "-mppc %{!mvsx:%{!maltivec:-maltivec}}" }, { "801", "-mppc" }, { "821", "-mppc" }, { "823", "-mppc" }, { "860", "-mppc" }, - { "970", "-mpower4 -maltivec" }, - { "G5", "-mpower4 -maltivec" }, + { "970", "-mpower4 %{!mvsx:%{!maltivec:-maltivec}}" }, + { "G5", "-mpower4 %{!mvsx:%{!maltivec:-maltivec}}" }, { "8540", "-me500" }, { "8548", "-me500" }, { "e300c2", "-me300" }, { "e300c3", "-me300" }, { "e500mc", "-me500mc" }, + { "e500mc64", "-me500mc64" }, + { "e5500", "-me5500" }, + { "e6500", "-me6500" }, { NULL, "\ -%{mpowerpc64*: -mppc64} \ -%{!mpowerpc64*: %(asm_default)}" }, +%{mpower9-vector: -mpower9; \ + mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \ + mvsx: -mpower7; \ + mpowerpc64: -mppc64; \ + : %(asm_default)}" }, #endif }; diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index c7934c601ed..d75137cf8f5 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -78,68 +78,66 @@ you make changes here, make them also there. PR63177: Do not pass -mpower8 to the assembler if -mpower9-vector was also used. */ #define ASM_CPU_SPEC \ -"%{!mcpu*: \ - %{mpowerpc64*: -mppc64} \ - %{!mpowerpc64*: %(asm_default)}} \ -%{mcpu=native: %(asm_cpu_native)} \ -%{mcpu=cell: -mcell} \ -%{mcpu=power3: -mppc64} \ -%{mcpu=power4: -mpower4} \ -%{mcpu=power5: -mpower5} \ -%{mcpu=power5+: -mpower5} \ -%{mcpu=power6: -mpower6 -maltivec} \ -%{mcpu=power6x: -mpower6 -maltivec} \ -%{mcpu=power7: -mpower7} \ -%{mcpu=power8: %{!mpower9-vector: -mpower8}} \ -%{mcpu=power9: -mpower9} \ -%{mcpu=a2: -ma2} \ -%{mcpu=powerpc: -mppc} \ -%{mcpu=powerpc64le: -mpower8} \ -%{mcpu=rs64a: -mppc64} \ -%{mcpu=401: -mppc} \ -%{mcpu=403: -m403} \ -%{mcpu=405: -m405} \ -%{mcpu=405fp: -m405} \ -%{mcpu=440: -m440} \ -%{mcpu=440fp: -m440} \ -%{mcpu=464: -m440} \ -%{mcpu=464fp: -m440} \ -%{mcpu=476: -m476} \ -%{mcpu=476fp: -m476} \ -%{mcpu=505: -mppc} \ -%{mcpu=601: -m601} \ -%{mcpu=602: -mppc} \ -%{mcpu=603: -mppc} \ -%{mcpu=603e: -mppc} \ -%{mcpu=ec603e: -mppc} \ -%{mcpu=604: -mppc} \ -%{mcpu=604e: -mppc} \ -%{mcpu=620: -mppc64} \ -%{mcpu=630: -mppc64} \ -%{mcpu=740: -mppc} \ -%{mcpu=750: -mppc} \ -%{mcpu=G3: -mppc} \ -%{mcpu=7400: -mppc -maltivec} \ -%{mcpu=7450: -mppc -maltivec} \ -%{mcpu=G4: -mppc -maltivec} \ -%{mcpu=801: -mppc} \ -%{mcpu=821: -mppc} \ -%{mcpu=823: -mppc} \ -%{mcpu=860: -mppc} \ -%{mcpu=970: -mpower4 -maltivec} \ -%{mcpu=G5: -mpower4 -maltivec} \ -%{mcpu=8540: -me500} \ -%{mcpu=8548: -me500} \ -%{mcpu=e300c2: -me300} \ -%{mcpu=e300c3: -me300} \ -%{mcpu=e500mc: -me500mc} \ -%{mcpu=e500mc64: -me500mc64} \ -%{mcpu=e5500: -me5500} \ -%{mcpu=e6500: -me6500} \ -%{maltivec: -maltivec} \ -%{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: -mpower7}} \ -%{mpower8-vector|mcrypto|mdirect-move|mhtm: %{!mcpu*: -mpower8}} \ -%{mpower9-vector: %{!mcpu*|mcpu=power8: -mpower9}} \ +"%{mcpu=native: %(asm_cpu_native); \ + mcpu=power9: -mpower9; \ + mcpu=power8|mcpu=powerpc64le: %{mpower9-vector: -mpower9;: -mpower8}; \ + mcpu=power7: -mpower7; \ + mcpu=power6x: -mpower6 %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=power6: -mpower6 %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=power5+: -mpower5; \ + mcpu=power5: -mpower5; \ + mcpu=power4: -mpower4; \ + mcpu=power3: -mppc64; \ + mcpu=powerpc: -mppc; \ + mcpu=a2: -ma2; \ + mcpu=cell: -mcell; \ + mcpu=rs64a: -mppc64; \ + mcpu=401: -mppc; \ + mcpu=403: -m403; \ + mcpu=405: -m405; \ + mcpu=405fp: -m405; \ + mcpu=440: -m440; \ + mcpu=440fp: -m440; \ + mcpu=464: -m440; \ + mcpu=464fp: -m440; \ + mcpu=476: -m476; \ + mcpu=476fp: -m476; \ + mcpu=505: -mppc; \ + mcpu=601: -m601; \ + mcpu=602: -mppc; \ + mcpu=603: -mppc; \ + mcpu=603e: -mppc; \ + mcpu=ec603e: -mppc; \ + mcpu=604: -mppc; \ + mcpu=604e: -mppc; \ + mcpu=620: -mppc64; \ + mcpu=630: -mppc64; \ + mcpu=740: -mppc; \ + mcpu=750: -mppc; \ + mcpu=G3: -mppc; \ + mcpu=7400: -mppc %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=7450: -mppc %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=G4: -mppc %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=801: -mppc; \ + mcpu=821: -mppc; \ + mcpu=823: -mppc; \ + mcpu=860: -mppc; \ + mcpu=970: -mpower4 %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=G5: -mpower4 %{!mvsx:%{!maltivec:-maltivec}}; \ + mcpu=8540: -me500; \ + mcpu=8548: -me500; \ + mcpu=e300c2: -me300; \ + mcpu=e300c3: -me300; \ + mcpu=e500mc: -me500mc; \ + mcpu=e500mc64: -me500mc64; \ + mcpu=e5500: -me5500; \ + mcpu=e6500: -me6500; \ + !mcpu*: %{mpower9-vector: -mpower9; \ + mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \ + mvsx: -mpower7; \ + mpowerpc64: -mppc64;: %(asm_default)}; \ + :%eMissing -mcpu option in ASM_SPEC_CPU?\n} \ +%{mvsx: -mvsx -maltivec; maltivec: -maltivec} \ -many" #define CPP_DEFAULT_SPEC ""