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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 Aug 2018 18:45:39 -0400 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w7KMjcHo46661668 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 20 Aug 2018 22:45:38 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4B1EC2805A; Mon, 20 Aug 2018 18:44:11 -0400 (EDT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1577428058; Mon, 20 Aug 2018 18:44:11 -0400 (EDT) Received: from ibm-toto.the-meissners.org (unknown [9.32.77.218]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTPS; Mon, 20 Aug 2018 18:44:10 -0400 (EDT) Date: Mon, 20 Aug 2018 18:45:37 -0400 From: Michael Meissner To: GCC Patches , Segher Boessenkool , David Edelsohn , Bill Schmidt , Michael Meissner Subject: [PATCH], PR target/87033, General LWAX on PowerPC Mail-Followup-To: Michael Meissner , GCC Patches , Segher Boessenkool , David Edelsohn , Bill Schmidt MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) x-cbid: 18082022-2213-0000-0000-000002DEBBFF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009581; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000266; SDB=6.01076447; UDB=6.00554909; IPR=6.00856417; MB=3.00022835; MTD=3.00000008; XFM=3.00000015; UTC=2018-08-20 22:45:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18082022-2214-0000-0000-00005B454A7C Message-Id: <20180820224537.GA9137@ibm-toto.the-meissners.org> In this patch earlier to improve switch behavior: https://gcc.gnu.org/ml/gcc-patches/2018-07/msg01957.html I noticed that the compiler wasn't generating the LWAX instruction. I tracked this down to the "extendsi2" insn using the "Y" constraint when it can optimize a load + sign extend into a single load with sign extend. The "Y" constraint is for DS-form offsettable addresses, and does not allow indexed addresses (i.e. X-form loads). This patch adds the "Z" constraint as well, which allows indexed addresses. I have down trunk builds with/without this patch and there were no regressions. Can I apply this patch to the trunk? Can I backport this patch to GCC 7 and GCC 8 as well with a suitable delay to catch any problems? [gcc] 2018-08-20 Michael Meissner PR target/87033 * config/rs6000/rs6000.md (extendsi2): Change constraints from 'Y' to 'YZ' to enable the LWAX instruction to be generated for indexed loads. [gcc/testsuite] 2018-08-20 Michael Meissner PR target/87033 * gcc.target/powerpc/pr87033.c: New test. Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 263672) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -988,7 +988,7 @@ (define_insn "extendsi2" "=r, r, wl, wu, wj, wK, wH, wr") (sign_extend:EXTSI (match_operand:SI 1 "lwa_operand" - "Y, r, Z, Z, r, wK, wH, ?wIwH")))] + "YZ, r, Z, Z, r, wK, wH, ?wIwH")))] "" "@ lwa%U1%X1 %0,%1 Index: gcc/testsuite/gcc.target/powerpc/pr87033.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr87033.c (nonexistent) +++ gcc/testsuite/gcc.target/powerpc/pr87033.c (working copy) @@ -0,0 +1,11 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ + +/* Insure that a LWAX is generated instead of ADD + LWA. */ +long func (int *p, unsigned long n) +{ + return p[n]; +} + +/* { dg-final { scan-assembler {\mlwax\M} } } */ +/* { dg-final { scan-assembler-not {\mlwa\M} } } */