[1/4] i386: Rename to ix86_indirect_branch_register

Message ID	20180115180928.16127-1-hjl.tools@gmail.com
State	New
Headers	show Return-Path: <gcc-patches-return-471291-incoming=patchwork.ozlabs.org@gcc.gnu.org> DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id; q=dns; s=default; b=xKxQc6FOxS0QNey HhLCfryNpLTnXNXF5kJf1ayXevhvYC2NvsYrJ8xvbtQl0zpZASjTsPgPH4506k3G BMGpA6jvR5h9Hc6Yo5gtFBzy/vSD7P5KxtkI85sEtFeV5GBrWhZ6om3twsN1Aq2k RbTpeSayV7Dfot+bfoJqfegXZwig= Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org From: "H.J. Lu" <hjl.tools@gmail.com> To: gcc-patches@gcc.gnu.org Subject: [PATCH 1/4] i386: Rename to ix86_indirect_branch_register Date: Mon, 15 Jan 2018 10:09:25 -0800 Message-Id: <20180115180928.16127-1-hjl.tools@gmail.com>
Series	[1/4] i386: Rename to ix86_indirect_branch_register \| expand [1/4] i386: Rename to ix86_indirect_branch_register [2/4] x86: Rewrite ix86_indirect_branch_register logic [3/4] Don't check ix86_indirect_branch_register for GOT operand [4/4] i386: Rewrite indirect_branch_operand logic

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 5592c43073e..d6072b9bcd9 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -226,19 +226,19 @@ (define_constraint "Bs" "@internal Sibcall memory operand." (ior (and (not (match_test "TARGET_X32 - || ix86_indirect_branch_thunk_register")) + || ix86_indirect_branch_register")) (match_operand 0 "sibcall_memory_operand")) (and (match_test "TARGET_X32 && Pmode == DImode - && !ix86_indirect_branch_thunk_register") + && !ix86_indirect_branch_register") (match_operand 0 "GOT_memory_operand")))) (define_constraint "Bw" "@internal Call memory operand." (ior (and (not (match_test "TARGET_X32 - || ix86_indirect_branch_thunk_register")) + || ix86_indirect_branch_register")) (match_operand 0 "memory_operand")) (and (match_test "TARGET_X32 && Pmode == DImode - && !ix86_indirect_branch_thunk_register") + && !ix86_indirect_branch_register") (match_operand 0 "GOT_memory_operand")))) (define_constraint "Bz" diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index fff73fe18e0..5cd3ec093cd 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12311,7 +12311,7 @@ [(set (pc) (match_operand 0 "indirect_branch_operand"))] "" { - if (TARGET_X32 || ix86_indirect_branch_thunk_register) + if (TARGET_X32 || ix86_indirect_branch_register) operands[0] = convert_memory_address (word_mode, operands[0]); cfun->machine->has_local_indirect_jump = true; }) @@ -12365,7 +12365,7 @@ OPTAB_DIRECT); } - if (TARGET_X32 || ix86_indirect_branch_thunk_register) + if (TARGET_X32 || ix86_indirect_branch_register) operands[0] = convert_memory_address (word_mode, operands[0]); cfun->machine->has_local_indirect_jump = true; }) @@ -12614,7 +12614,7 @@ [(call (mem:QI (match_operand:W 0 "memory_operand" "m")) (match_operand 1)) (unspec [(const_int 0)] UNSPEC_PEEPSIB)] - "!TARGET_X32 && !ix86_indirect_branch_thunk_register" + "!TARGET_X32 && !ix86_indirect_branch_register" "* return ix86_output_call_insn (insn, operands[0]);" [(set_attr "type" "call")]) @@ -12624,7 +12624,7 @@ (call (mem:QI (match_dup 0)) (match_operand 3))] "!TARGET_X32 - && !ix86_indirect_branch_thunk_register + && !ix86_indirect_branch_register && SIBLING_CALL_P (peep2_next_insn (1)) && !reg_mentioned_p (operands[0], CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))" @@ -12639,7 +12639,7 @@ (call (mem:QI (match_dup 0)) (match_operand 3))] "!TARGET_X32 - && !ix86_indirect_branch_thunk_register + && !ix86_indirect_branch_register && SIBLING_CALL_P (peep2_next_insn (2)) && !reg_mentioned_p (operands[0], CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))" @@ -12737,7 +12737,7 @@ (match_operand:W 1 "memory_operand")) (set (pc) (match_dup 0))] "!TARGET_X32 - && !ix86_indirect_branch_thunk_register + && !ix86_indirect_branch_register && peep2_reg_dead_p (2, operands[0])" [(set (pc) (match_dup 1))]) @@ -12819,7 +12819,7 @@ (call (mem:QI (match_operand:W 1 "memory_operand" "m")) (match_operand 2))) (unspec [(const_int 0)] UNSPEC_PEEPSIB)] - "!TARGET_X32 && !ix86_indirect_branch_thunk_register" + "!TARGET_X32 && !ix86_indirect_branch_register" "* return ix86_output_call_insn (insn, operands[1]);" [(set_attr "type" "callv")]) @@ -12830,7 +12830,7 @@ (call (mem:QI (match_dup 0)) (match_operand 3)))] "!TARGET_X32 - && !ix86_indirect_branch_thunk_register + && !ix86_indirect_branch_register && SIBLING_CALL_P (peep2_next_insn (1)) && !reg_mentioned_p (operands[0], CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))" @@ -12847,7 +12847,7 @@ (call (mem:QI (match_dup 0)) (match_operand 3)))] "!TARGET_X32 - && !ix86_indirect_branch_thunk_register + && !ix86_indirect_branch_register && SIBLING_CALL_P (peep2_next_insn (2)) && !reg_mentioned_p (operands[0], CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))" diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index c6be5f94773..3a306bbd73f 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1047,5 +1047,5 @@ EnumValue Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) mindirect-branch-register -Target Report Var(ix86_indirect_branch_thunk_register) Init(0) +Target Report Var(ix86_indirect_branch_register) Init(0) Force indirect call and jump via register. diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 5ae443231b8..64f13a01326 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -666,7 +666,7 @@ (define_predicate "indirect_branch_operand" (ior (match_operand 0 "register_operand") (and (not (match_test "TARGET_X32 - || ix86_indirect_branch_thunk_register")) + || ix86_indirect_branch_register")) (match_operand 0 "memory_operand")))) ;; Return true if OP is a memory operands that can be used in sibcalls. @@ -695,7 +695,7 @@ ;; Return true if OP is a GOT memory operand. (define_predicate "GOT_memory_operand" - (and (match_test "!ix86_indirect_branch_thunk_register") + (and (match_test "!ix86_indirect_branch_register") (match_operand 0 "memory_operand")) { op = XEXP (op, 0); @@ -711,10 +711,10 @@ (op, mode == VOIDmode ? mode : Pmode)") (match_operand 0 "call_register_no_elim_operand") (ior (and (not (match_test "TARGET_X32 - || ix86_indirect_branch_thunk_register")) + || ix86_indirect_branch_register")) (match_operand 0 "memory_operand")) (and (match_test "TARGET_X32 && Pmode == DImode - && !ix86_indirect_branch_thunk_register") + && !ix86_indirect_branch_register") (match_operand 0 "GOT_memory_operand"))))) ;; Similarly, but for tail calls, in which we cannot allow memory references. @@ -723,15 +723,15 @@ (op, mode == VOIDmode ? mode : Pmode)") (match_operand 0 "register_no_elim_operand") (ior (and (not (match_test "TARGET_X32 - || ix86_indirect_branch_thunk_register")) + || ix86_indirect_branch_register")) (match_operand 0 "sibcall_memory_operand")) (and (match_test "TARGET_X32 && Pmode == DImode - && !ix86_indirect_branch_thunk_register") + && !ix86_indirect_branch_register") (match_operand 0 "GOT_memory_operand"))))) ;; Return true if OP is a 32-bit GOT symbol operand. (define_predicate "GOT32_symbol_operand" - (match_test "!ix86_indirect_branch_thunk_register + (match_test "!ix86_indirect_branch_register && GET_CODE (op) == CONST && GET_CODE (XEXP (op, 0)) == UNSPEC && XINT (XEXP (op, 0), 1) == UNSPEC_GOT"))

[1/4] i386: Rename to ix86_indirect_branch_register

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