From patchwork Mon Nov 20 12:50:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Cederman X-Patchwork-Id: 839530 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-467409-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="YYfdYVqz"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygT8w2NRkz9rxj for ; Mon, 20 Nov 2017 23:50:40 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=Dd4aSKa5JaHuCavuqK7TsK19Gqapf3ndKVFCCyV980LYQZTXxjLgk mUSkouYwb+XzrnU/jZ1NnwZxfTfcTq+VG+Th2EH5cj20+2CLyHCRVdcb6IBn2pZw m8RmcgTfxu5gv16ORSKOb+5INE5+l0pBVeFO66W2xp36VAqhukOnY8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=D6TZ0MxLcIzVDtDASdrC9UoxWAQ=; b=YYfdYVqzA9tpDPiGvSlq 9Amsa4nAGAKtZN5rW+zKWcse26Pg8RKLAAgwQIm/y9SInyy+mVgYRnF+WszKoURN NL1rfFGkyikgIOWRohSzWI5UUqZE6BOkn5sZrXT9VntH+S8LWMMS6WA/n186iKRm dkiwuBxv1sSSn5w8Tg19VMU= Received: (qmail 5278 invoked by alias); 20 Nov 2017 12:50:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 5186 invoked by uid 89); 20 Nov 2017 12:50:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, KB_WAM_FROM_NAME_SINGLEWORD, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=H*Ad:U*daniel, supervisor, H*Ad:U*ebotcazou, casa X-HELO: bin-vsp-out-03.atm.binero.net Received: from vsp-unauthed02.binero.net (HELO bin-vsp-out-03.atm.binero.net) (195.74.38.227) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 20 Nov 2017 12:50:16 +0000 X-Halon-ID: 586e8a56-cdf1-11e7-811b-0050569116f7 Authorized-sender: cederman@gaisler.com Received: from localhost.localdomain (unknown [81.170.187.120]) by bin-vsp-out-03.atm.binero.net (Halon) with ESMTPA id 586e8a56-cdf1-11e7-811b-0050569116f7; Mon, 20 Nov 2017 13:50:11 +0100 (CET) From: Daniel Cederman To: gcc-patches@gcc.gnu.org Cc: ebotcazou@adacore.com, sebastian.huber@embedded-brains.de, daniel@gaisler.com Subject: [PATCH 2/4] [SPARC] Errata workaround for GRLIB-TN-0011 Date: Mon, 20 Nov 2017 13:50:01 +0100 Message-Id: <20171120125003.22670-3-cederman@gaisler.com> In-Reply-To: <20171120125003.22670-1-cederman@gaisler.com> References: <20171120125003.22670-1-cederman@gaisler.com> X-IsSubscribed: yes This patch provides a workaround for the errata described in GRLIB-TN-0011. If the workaround is enabled it will: * Insert .align 16 before atomic instructions (swap, ldstub, casa). It is applicable to GR712RC. gcc/ChangeLog: 2017-11-17 Daniel Cederman * config/sparc/sync.md (swapsi): 16-byte align if sparc_fix_gr712rc. (atomic_compare_and_swap_leon3_1): Likewise. (ldstub): Likewise. --- gcc/config/sparc/sync.md | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md index 1593bde..d5c505b 100644 --- a/gcc/config/sparc/sync.md +++ b/gcc/config/sparc/sync.md @@ -222,6 +222,8 @@ UNSPECV_CAS))] "TARGET_LEON3" { + if (sparc_fix_gr712rc) + output_asm_insn (".align\t16", operands); if (TARGET_SV_MODE) return "casa\t%1 0xb, %2, %0"; /* ASI for supervisor data space. */ else @@ -275,7 +277,12 @@ (set (match_dup 1) (match_operand:SI 2 "register_operand" "0"))] "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699" - "swap\t%1, %0" +{ + if (sparc_fix_gr712rc) + return ".align\t16\n\tswap\t%1, %0"; + else + return "swap\t%1, %0"; +} [(set_attr "type" "multi")]) (define_expand "atomic_test_and_set" @@ -307,5 +314,10 @@ UNSPECV_LDSTUB)) (set (match_dup 1) (const_int -1))] "!sparc_fix_ut699" - "ldstub\t%1, %0" +{ + if (sparc_fix_gr712rc) + return ".align\t16\n\tldstub\t%1, %0"; + else + return "ldstub\t%1, %0"; +} [(set_attr "type" "multi")])