diff mbox series

[1/4,SPARC] Errata workaround for GRLIB-TN-0012

Message ID 20171120125003.22670-2-cederman@gaisler.com
State New
Headers show
Series Workarounds for UT699, UT700, and GR712RC errata | expand

Commit Message

Daniel Cederman Nov. 20, 2017, 12:50 p.m. UTC
This patch provides a workaround for the errata described in GRLIB-TN-0012.

If the workaround is enabled it will:

* Prevent any floating-point operation from being placed in the
  delay slot of an annulled integer branch.

* Place a NOP at the branch target of an integer branch if it is
  a floating-point operation or a floating-point branch.

It is applicable to GR712RC.

gcc/ChangeLog:

2017-11-17  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.c (fpop_insn_p): New function.
	(sparc_do_work_around_errata): Insert NOP instructions to
	prevent sequences that could trigger the TN-0012 errata for
	GR712RC.
	(pass_work_around_errata::gate): Also test sparc_fix_gr712rc.
	* config/sparc/sparc.md (fix_gr712rc): New attribute.
	(in_branch_annul_delay): Prevent floating-point instructions
	in delay slot of annulled integer branch.
---
 gcc/config/sparc/sparc.c  | 50 +++++++++++++++++++++++++++++++++++++++++++++--
 gcc/config/sparc/sparc.md | 17 ++++++++++++++++
 2 files changed, 65 insertions(+), 2 deletions(-)

Comments

Eric Botcazou Nov. 24, 2017, 10:38 a.m. UTC | #1
> 2017-11-17  Daniel Cederman  <cederman@gaisler.com>
> 
> 	* config/sparc/sparc.c (fpop_insn_p): New function.
> 	(sparc_do_work_around_errata): Insert NOP instructions to
> 	prevent sequences that could trigger the TN-0012 errata for
> 	GR712RC.
> 	(pass_work_around_errata::gate): Also test sparc_fix_gr712rc.
> 	* config/sparc/sparc.md (fix_gr712rc): New attribute.
> 	(in_branch_annul_delay): Prevent floating-point instructions
> 	in delay slot of annulled integer branch.

OK for mainline and 7 branch modulo the following nits:

> +/* True if floating-point instruction.  */
> +
> +static int
> +fpop_insn_p (rtx_insn *insn)

'bool' instead of 'int'.  "True if INSN is a floating-point instruction."

> +{
> +  if ( GET_CODE (PATTERN (insn)) != SET)
> +    return false;

No space before GET_CODE.

>  /* We use a machine specific pass to enable workarounds for errata.
> 
>     We need to have the (essentially) final form of the insn stream in order
> @@ -970,11 +995,31 @@ sparc_do_work_around_errata (void)
>      {
>        bool insert_nop = false;
>        rtx set;
> +      rtx_insn *jump = 0;
> 
>        /* Look into the instruction in a delay slot.  */
>        if (NONJUMP_INSN_P (insn))
>  	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
> -	  insn = seq->insn (1);
> +	  {
> +	    jump = seq->insn (0);
> +	    insn = seq->insn (1);
> +	  }

This should be changed into:

      rtx_insn jump;

      /* Look into the instruction in a delay slot.  */
      if (NONJUMP_INSN_P (insn)
	  && (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
	{
	  jump = seq->insn (0);
	  insn = seq->insn (1);
	}
      else if (JUMP_P (insn))
	jump = insn
      else
	jump = NULL_RTX;

and the block below simplified accordingly.

> +      /* Place a NOP at the branch target of an integer branch if it is
> +	 a floating-point operation or a floating-point branch.  */
> +      if (sparc_fix_gr712rc
> +	  && (JUMP_P (insn) || jump)
> +	  && get_attr_branch_type (jump ? jump : insn) == BRANCH_TYPE_ICC)
> +	{
> +	  rtx_insn *target;
> +
> +	  target = next_active_insn (JUMP_LABEL_AS_INSN (jump ? jump : insn));

	  rtx_insn *target = next_active_insn (JUMP_LABEL_AS_INSN (jump));

>        /* Look for either of these two sequences:
> 
> @@ -1303,7 +1348,8 @@ public:
>    /* opt_pass methods: */
>    virtual bool gate (function *)
>      {
> -      return sparc_fix_at697f || sparc_fix_ut699 || sparc_fix_b2bst;
> +      return sparc_fix_at697f || sparc_fix_ut699 || sparc_fix_b2bst
> +	|| sparc_fix_gr712rc;
>      }

"|| sparc_fix_gr712rc" lined up under sparc_fix_at697f.

> @@ -602,6 +615,10 @@
>  (define_delay (eq_attr "type" "branch")
>    [(eq_attr "in_branch_delay" "true") (nil) (eq_attr "in_branch_delay"
> "true")])
> 
> +(define_delay (and (eq_attr "type" "branch") (eq_attr "branch_type" "icc"))
> +  [(eq_attr "in_branch_delay" "true") (nil)
> +  (eq_attr "in_branch_annul_delay" "true")])
> +

I think that we'd better keep the various define_delay's mutually exclusive.
diff mbox series

Patch

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index a9945e2..8f6eb48 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -945,6 +945,31 @@  mem_ref (rtx x)
   return NULL_RTX;
 }
 
+/* True if floating-point instruction.  */
+
+static int
+fpop_insn_p (rtx_insn *insn)
+{
+  if ( GET_CODE (PATTERN (insn)) != SET)
+    return false;
+
+  switch (get_attr_type (insn))
+    {
+    case TYPE_FPMOVE:
+    case TYPE_FPCMOVE:
+    case TYPE_FP:
+    case TYPE_FPCMP:
+    case TYPE_FPMUL:
+    case TYPE_FPDIVS:
+    case TYPE_FPSQRTS:
+    case TYPE_FPDIVD:
+    case TYPE_FPSQRTD:
+      return true;
+    default:
+      return false;
+    }
+}
+
 /* We use a machine specific pass to enable workarounds for errata.
 
    We need to have the (essentially) final form of the insn stream in order
@@ -970,11 +995,31 @@  sparc_do_work_around_errata (void)
     {
       bool insert_nop = false;
       rtx set;
+      rtx_insn *jump = 0;
 
       /* Look into the instruction in a delay slot.  */
       if (NONJUMP_INSN_P (insn))
 	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
-	  insn = seq->insn (1);
+	  {
+	    jump = seq->insn (0);
+	    insn = seq->insn (1);
+	  }
+
+      /* Place a NOP at the branch target of an integer branch if it is
+	 a floating-point operation or a floating-point branch.  */
+      if (sparc_fix_gr712rc
+	  && (JUMP_P (insn) || jump)
+	  && get_attr_branch_type (jump ? jump : insn) == BRANCH_TYPE_ICC)
+	{
+	  rtx_insn *target;
+
+	  target = next_active_insn (JUMP_LABEL_AS_INSN (jump ? jump : insn));
+	  if (target
+	      && (fpop_insn_p (target)
+		  || ((JUMP_P (target)
+		       && get_attr_branch_type (target) == BRANCH_TYPE_FCC))))
+	    emit_insn_before (gen_nop (), target);
+	}
 
       /* Look for either of these two sequences:
 
@@ -1303,7 +1348,8 @@  public:
   /* opt_pass methods: */
   virtual bool gate (function *)
     {
-      return sparc_fix_at697f || sparc_fix_ut699 || sparc_fix_b2bst;
+      return sparc_fix_at697f || sparc_fix_ut699 || sparc_fix_b2bst
+	|| sparc_fix_gr712rc;
     }
 
   virtual unsigned int execute (function *)
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index d9cbd4f..ef789e2 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -430,6 +430,10 @@ 
    (symbol_ref "(sparc_fix_b2bst != 0
 		 ? FIX_B2BST_TRUE : FIX_B2BST_FALSE)"))
 
+(define_attr "fix_gr712rc" "false,true"
+   (symbol_ref "(sparc_fix_gr712rc != 0
+		 ? FIX_GR712RC_TRUE : FIX_GR712RC_FALSE)"))
+
 ;; Length (in # of insns).
 ;; Beware that setting a length greater or equal to 3 for conditional branches
 ;; has a side-effect (see output_cbranch and output_v9branch).
@@ -590,6 +594,15 @@ 
 	   (const_string "true")
 	] (const_string "false")))
 
+(define_attr "in_branch_annul_delay" "false,true"
+  (cond[(and (eq_attr "fix_gr712rc" "true")
+	     (eq_attr "type" "fp,fpcmp,fpmove,fpcmove,fpmul,
+			      fpdivs,fpsqrts,fpdivd,fpsqrtd"))
+	   (const_string "false")
+	(eq_attr "in_branch_delay" "true")
+	   (const_string "true")
+	] (const_string "false")))
+
 (define_delay (eq_attr "type" "call")
   [(eq_attr "in_call_delay" "true") (nil) (nil)])
 
@@ -602,6 +615,10 @@ 
 (define_delay (eq_attr "type" "branch")
   [(eq_attr "in_branch_delay" "true") (nil) (eq_attr "in_branch_delay" "true")])
 
+(define_delay (and (eq_attr "type" "branch") (eq_attr "branch_type" "icc"))
+  [(eq_attr "in_branch_delay" "true") (nil)
+  (eq_attr "in_branch_annul_delay" "true")])
+
 (define_delay (eq_attr "type" "uncond_branch")
   [(eq_attr "in_branch_delay" "true") (nil) (nil)])