From patchwork Thu Oct 19 08:09:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 827961 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-464502-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="oZq1hhDy"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yHhRm4R5Vz9tX7 for ; Thu, 19 Oct 2017 19:09:52 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; q=dns; s=default; b=smMHIa27ZMd69QuCAeFEfxqD8AEUv Qzn62LVaglpYLDVEpbHtm5wdaObnHciNJbHZZxhOJWjKOxya4hLJznLfXnboszbG LAgPMJmP0/xUKmWxnt2aur2bcj+9xES1pN3y9nIaWHkaCa8F9HIpu+5c3EpzNoKh U/+M7BMH4zgjec= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; s=default; bh=04K8YPfqM8qmNp0FRcGn1qrQ9Ps=; b=oZq 1hhDyuCLVZfPa1j4mxpvDDPL051D+Ivv1PhRLfhs27umfqngcNLYsvMeIcPLko8J vXxpiZuTCrnWdb2Xtyi/OBzGJMbkXLaJIoG7O7doGzPBvDDLQqQxXwRibg1805Wb Q0Stg/n/lVn4gvOV+DWBfUmdho4OS5JqhlMjSmgA= Received: (qmail 5827 invoked by alias); 19 Oct 2017 08:09:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 5815 invoked by uid 89); 19 Oct 2017 08:09:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.9 required=5.0 tests=BAYES_00, GIT_PATCH_2, GIT_PATCH_3, RP_MATCHES_RCVD, SPF_HELO_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 19 Oct 2017 08:09:42 +0000 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B09604900D; Thu, 19 Oct 2017 08:09:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com B09604900D Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=jakub@redhat.com Received: from tucnak.zalov.cz (ovpn-116-223.ams2.redhat.com [10.36.116.223]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5AB89831B2; Thu, 19 Oct 2017 08:09:40 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id v9J89cWb011500; Thu, 19 Oct 2017 10:09:38 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id v9J89Zvw011499; Thu, 19 Oct 2017 10:09:35 +0200 Date: Thu, 19 Oct 2017 10:09:35 +0200 From: Jakub Jelinek To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Subject: [PATCH, i386] Improve double-word comparisons (PR target/82580) Message-ID: <20171019080935.GM14653@tucnak> Reply-To: Jakub Jelinek MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.7.1 (2016-10-04) X-IsSubscribed: yes Hi! With the patch you've checked in yesterday we generate e.g. for f2 cmpq %rdi, %rdx sbbq %rsi, %rcx setb %al movzbl %al, %eax This is because the peephole2s we have for setcc + movzbl to xorl + setcc check that the flags register is dead before the instruction before setcc (sbbq above), which is not the case, so we can't insert xorl %eax, %eax before sbbq, as that woiuld clobber flags. But we can emit xorl %eax, %eax cmpq %rdi, %rdx sbbq %rsi, %rcx setb %al in this case, move the clearing one insn earlier (of course assuming that neither the cmpq nor sbbq use or set %rax). The following peephole2s do that, bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? The reason for only testing no movzb* insns for lp64 is that for -m32 there are some - the arguments are passed on the stack, so they need to be loaded from there and %eax is one of the registers it chooses to use. 2017-10-19 Jakub Jelinek PR target/82580 * config/i386/i386.md (setcc + movzbl to xor + setcc): New peephole2. (setcc + and to xor + setcc): New peephole2. * gcc.target/i386/pr82580.c: Use {\msbb} instead of "sbb" in scan-assembler-times. Check that there are no movzb* instructions if lp64. Jakub --- gcc/config/i386/i386.md.jj 2017-10-18 14:01:33.000000000 +0200 +++ gcc/config/i386/i386.md 2017-10-18 14:38:04.623063038 +0200 @@ -12300,6 +12300,34 @@ (define_peephole2 ix86_expand_clear (operands[3]); }) +(define_peephole2 + [(set (reg FLAGS_REG) (match_operand 0)) + (parallel [(set (reg FLAGS_REG) (match_operand 1)) + (match_operand 5)]) + (set (match_operand:QI 2 "register_operand") + (match_operator:QI 3 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)])) + (set (match_operand 4 "any_QIreg_operand") + (zero_extend (match_dup 2)))] + "(peep2_reg_dead_p (4, operands[2]) + || operands_match_p (operands[2], operands[4])) + && ! reg_overlap_mentioned_p (operands[4], operands[0]) + && ! reg_overlap_mentioned_p (operands[4], operands[1]) + && ! reg_set_p (operands[4], operands[5]) + && refers_to_regno_p (FLAGS_REG, operands[1], (rtx *)NULL) + && peep2_regno_dead_p (0, FLAGS_REG)" + [(set (match_dup 6) (match_dup 0)) + (parallel [(set (match_dup 7) (match_dup 1)) + (match_dup 5)]) + (set (strict_low_part (match_dup 8)) + (match_dup 3))] +{ + operands[6] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG); + operands[7] = gen_rtx_REG (GET_MODE (operands[1]), FLAGS_REG); + operands[8] = gen_lowpart (QImode, operands[4]); + ix86_expand_clear (operands[4]); +}) + ;; Similar, but match zero extend with andsi3. (define_peephole2 @@ -12345,6 +12373,35 @@ (define_peephole2 operands[6] = gen_lowpart (QImode, operands[3]); ix86_expand_clear (operands[3]); }) + +(define_peephole2 + [(set (reg FLAGS_REG) (match_operand 0)) + (parallel [(set (reg FLAGS_REG) (match_operand 1)) + (match_operand 5)]) + (set (match_operand:QI 2 "register_operand") + (match_operator:QI 3 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)])) + (parallel [(set (match_operand 4 "any_QIreg_operand") + (zero_extend (match_dup 2))) + (clobber (reg:CC FLAGS_REG))])] + "(peep2_reg_dead_p (4, operands[2]) + || operands_match_p (operands[2], operands[4])) + && ! reg_overlap_mentioned_p (operands[4], operands[0]) + && ! reg_overlap_mentioned_p (operands[4], operands[1]) + && ! reg_set_p (operands[4], operands[5]) + && refers_to_regno_p (FLAGS_REG, operands[1], (rtx *)NULL) + && peep2_regno_dead_p (0, FLAGS_REG)" + [(set (match_dup 6) (match_dup 0)) + (parallel [(set (match_dup 7) (match_dup 1)) + (match_dup 5)]) + (set (strict_low_part (match_dup 8)) + (match_dup 3))] +{ + operands[6] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG); + operands[7] = gen_rtx_REG (GET_MODE (operands[1]), FLAGS_REG); + operands[8] = gen_lowpart (QImode, operands[4]); + ix86_expand_clear (operands[4]); +}) ;; Call instructions. --- gcc/testsuite/gcc.target/i386/pr82580.c.jj 2017-10-19 09:08:14.499637398 +0200 +++ gcc/testsuite/gcc.target/i386/pr82580.c 2017-10-19 10:01:22.148721921 +0200 @@ -35,4 +35,5 @@ void f21 (S x, S y) { if (x >= y) bar () void f22 (S x, S y) { if (x < y) bar (); } void f23 (S x, S y) { if (x <= y) bar (); } -/* { dg-final { scan-assembler-times "sbb" 16 } } */ +/* { dg-final { scan-assembler-times {\msbb} 16 } } */ +/* { dg-final { scan-assembler-not {\mmovzb} { target lp64 } } } */