From patchwork Fri Mar 24 14:10:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Krebbel X-Patchwork-Id: 743207 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vqQR82lBMz9s0m for ; Sat, 25 Mar 2017 01:14:44 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="t5Et3FME"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:in-reply-to:references:message-id; q=dns; s= default; b=oNvHDt6J+tZnRDBTKB3QPXpk5YFXI2FnkB2TN58f7VDO7+FbKFTpl irYeLrBDZ5l8UCpRmSwikqxXeYYdOsClZQZIzlOnon0iDGZ1hkVYHg0nKOHFRMcR nvnincwZ6iP+b1olqAfHgrPKODb7FoR+/mxnA+u1cQQ3vFXWZyb5q8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:in-reply-to:references:message-id; s=default; bh=D7ljEhegrh/kXoDW7iKd/vJf0rQ=; b=t5Et3FMEHqOixbQP2G7m4w5VzLJ5 +CX9c5YPctHj2x/lQ6jtiVp6MOF4by2FckzFXm0b6O1XBnZPcbBkxqglC3y2kWso od3+sUIACMCLy+OWrlzDG4QHmtAqfZ7Lz5L0bU6lpnHlwu9eNRilSZ6liIGiYfma s4ZJM36XHQiueCk= Received: (qmail 29212 invoked by alias); 24 Mar 2017 14:11:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28011 invoked by uid 89); 24 Mar 2017 14:11:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=ff, r20, 16806 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 24 Mar 2017 14:11:05 +0000 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v2OE8eJY056114 for ; Fri, 24 Mar 2017 10:11:05 -0400 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0b-001b2d01.pphosted.com with ESMTP id 29cmcbc1m9-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 24 Mar 2017 10:11:05 -0400 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 24 Mar 2017 14:11:03 -0000 Received: from b06cxnps4075.portsmouth.uk.ibm.com (9.149.109.197) by e06smtp13.uk.ibm.com (192.168.101.143) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 24 Mar 2017 14:11:02 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v2OEB1Kj36634838 for ; Fri, 24 Mar 2017 14:11:01 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 493494C052 for ; Fri, 24 Mar 2017 14:10:40 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F78C4C074 for ; Fri, 24 Mar 2017 14:10:40 +0000 (GMT) Received: from maggie.boeblingen.de.ibm.com (unknown [9.152.212.134]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTPS for ; Fri, 24 Mar 2017 14:10:40 +0000 (GMT) From: Andreas Krebbel To: gcc-patches@gcc.gnu.org Subject: [PATCH 07/16] S/390: Use wfc for scalar vector compares Date: Fri, 24 Mar 2017 15:10:44 +0100 In-Reply-To: <20170324141053.16840-1-krebbel@linux.vnet.ibm.com> References: <20170324141053.16840-1-krebbel@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17032414-0012-0000-0000-000004F2EC13 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17032414-0013-0000-0000-000017C1D622 Message-Id: <20170324141053.16840-8-krebbel@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-24_12:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703240123 X-IsSubscribed: yes The z13 vector support used the vector style comparison instructions also for the scalar compares in vector registers. However, it is much more convenient to just use the compare scalar instruction for that purpose. The advantage is that this instruction generates a CC result as our compares usually do. So this results in quite some code to be removed from the backend. Regression tested on s390x. gcc/ChangeLog: 2017-03-24 Andreas Krebbel * config/s390/2964.md: Remove the single element vector compare instructions which are no longer used. * config/s390/s390.c (s390_select_ccmode): Remove handling of vector CCmodes. (s390_canonicalize_comparison): Remove handling of DFmode compares. (s390_expand_vec_compare_scalar): Remove function. (s390_emit_compare): Don't call s390_expand_vec_compare_scalar. * config/s390/s390.md ("*vec_cmpdf_cconly"): Remove pattern. ("*cmp_ccs"): Add wfcdb instruction. gcc/testsuite/ChangeLog: 2017-03-24 Andreas Krebbel * gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust for the comparison instructions used from now on. --- gcc/ChangeLog | 14 +++ gcc/config/s390/2964.md | 8 +- gcc/config/s390/s390.c | 102 +-------------------- gcc/config/s390/s390.md | 26 ++---- gcc/testsuite/ChangeLog | 5 + .../gcc.target/s390/vector/vec-scalar-cmp-1.c | 31 +++++-- 6 files changed, 57 insertions(+), 129 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4dd2be6..fef571c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,19 @@ 2017-03-24 Andreas Krebbel + * config/s390/2964.md: Remove the single element vector compare + instructions which are no longer used. + * config/s390/s390.c (s390_select_ccmode): Remove handling of + vector CCmodes. + (s390_canonicalize_comparison): Remove handling of DFmode + compares. + (s390_expand_vec_compare_scalar): Remove function. + (s390_emit_compare): Don't call s390_expand_vec_compare_scalar. + * config/s390/s390.md ("*vec_cmpdf_cconly"): Remove + pattern. + ("*cmp_ccs"): Add wfcdb instruction. + +2017-03-24 Andreas Krebbel + * config/s390/s390.md ("mov_64dfp" DD_DF): Use vleig for loading a FP zero. ("*mov_64" DD_DF): Remove the vector instructions. These diff --git a/gcc/config/s390/2964.md b/gcc/config/s390/2964.md index 374e2e3..d9b6729 100644 --- a/gcc/config/s390/2964.md +++ b/gcc/config/s390/2964.md @@ -88,7 +88,7 @@ vsh,vsl,vsq,lxebr,cdtr,fiebr,vupllb,vupllf,vupllh,vmrhb,madbr,vtm,vmrhf,\ vmrhg,vmrhh,axtr,fiebra,vleb,cxtr,vlef,vleg,vleh,vpkf,vpkg,vpkh,vmlob,vmlof,\ vmloh,lxdb,ldeb,mdtr,vceqfs,adb,wflndb,lxeb,vn,vo,vchlb,vx,mxtr,vchlf,vchlg,\ vchlh,vfcedbs,vfcedb,vceqgs,cxbr,msdbr,vcdgb,debr,vceqhs,meeb,lcxbr,vavglb,\ -vavglf,vavglg,vavglh,wfcedbs,vmrlb,vmrlf,vmrlg,vmrlh,wfchedbs,vmxb,tcdb,\ +vavglf,vavglg,vavglh,vmrlb,vmrlf,vmrlg,vmrlh,vmxb,tcdb,\ vmahh,vsrlb,wcgdb,lcdbr,vistrbs,vrepb,wfmdb,vrepf,vrepg,vreph,ler,wcdlgb,\ ley,vistrb,vistrf,vistrh,tceb,wfsqdb,sqeb,vsumqf,vsumqg,vesrlb,vfeezbs,\ maebr,vesrlf,vesrlg,vesrlh,vmeb,vmef,vmeh,meebr,vflcdb,wfmadb,vperm,sxtr,\ @@ -96,7 +96,7 @@ vclzf,vgm,vgmb,vgmf,vgmg,vgmh,tdcxt,vzero,msebr,veslb,veslf,veslg,vfenezb,\ vfenezf,vfenezh,vistrfs,vchf,vchg,vchh,vmhb,vmhf,vmhh,cdb,veslvb,ledbr,\ veslvf,veslvg,veslvh,wclgdb,vfmdb,vmnlb,vmnlf,vmnlg,vmnlh,vclzb,vfeezfs,\ vclzg,vclzh,mdb,vmxlb,vmxlf,vmxlg,vmxlh,ltdtr,vsbcbiq,ceb,wfddb,sebr,vistrhs,\ -lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,vlpf,vlpg,vsegb,vaq,vsegf,vsegh,wfchdbs,\ +lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,vlpf,vlpg,vsegb,vaq,vsegf,vsegh,\ sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,vchlbs,vacccq,vmaleb,vsel,vmalef,vmaleh,\ vflndb,mdbr,vmlb,wflpdb,ldetr,vpksfs,vpksf,vpksg,vpksh,sqdb,mxbr,sqdbr,\ vmaeb,veslh,vmaef,vpklsf,vpklsg,vpklsh,verllb,vchb,ddtr,verllf,verllg,verllh,\ @@ -164,7 +164,7 @@ vsl,vsq,lxebr,cdtr,fiebr,vupllb,vupllf,vupllh,vmrhb,madbr,vtm,vmrhf,vmrhg,\ vmrhh,axtr,fiebra,vleb,cxtr,vlef,vleg,vleh,vpkf,vpkg,vpkh,vmlob,vmlof,vmloh,\ lxdb,ldeb,vceqfs,adb,wflndb,lxeb,vn,vo,vchlb,vx,vchlf,vchlg,vchlh,vfcedbs,\ vfcedb,vceqgs,cxbr,msdbr,vcdgb,vceqhs,meeb,lcxbr,vavglb,vavglf,vavglg,vavglh,\ -wfcedbs,vmrlb,vmrlf,vmrlg,vmrlh,wfchedbs,vmxb,tcdb,vmahh,vsrlb,wcgdb,lcdbr,\ +vmrlb,vmrlf,vmrlg,vmrlh,vmxb,tcdb,vmahh,vsrlb,wcgdb,lcdbr,\ vistrbs,vrepb,wfmdb,vrepf,vrepg,vreph,ler,wcdlgb,ley,vistrb,vistrf,vistrh,\ tceb,vsumqf,vsumqg,vesrlb,vfeezbs,maebr,vesrlf,vesrlg,vesrlh,vmeb,vmef,\ vmeh,meebr,vflcdb,wfmadb,vperm,sxtr,vclzf,vgm,vgmb,vgmf,vgmg,vgmh,tdcxt,\ @@ -172,7 +172,7 @@ vzero,msebr,veslb,veslf,veslg,vfenezb,vfenezf,vfenezh,vistrfs,vchf,vchg,\ vchh,vmhb,vmhf,vmhh,cdb,veslvb,ledbr,veslvf,veslvg,veslvh,wclgdb,vfmdb,\ vmnlb,vmnlf,vmnlg,vmnlh,vclzb,vfeezfs,vclzg,vclzh,mdb,vmxlb,vmxlf,vmxlg,\ vmxlh,ltdtr,vsbcbiq,ceb,sebr,vistrhs,lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,\ -vlpf,vlpg,vsegb,vaq,vsegf,vsegh,wfchdbs,sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,\ +vlpf,vlpg,vsegb,vaq,vsegf,vsegh,sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,\ vchlbs,vacccq,vmaleb,vsel,vmalef,vmaleh,vflndb,mdbr,vmlb,wflpdb,ldetr,vpksfs,\ vpksf,vpksg,vpksh,vmaeb,veslh,vmaef,vpklsf,vpklsg,vpklsh,verllb,vchb,verllf,\ verllg,verllh,wfsdb,maeb,vclgdb,vftcidb,vpksgs,vmxf,vmxg,vmxh,fidbra,vmnb,\ diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 65a7546..eac39c5 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -1402,29 +1402,6 @@ s390_tm_ccmode (rtx op1, rtx op2, bool mixed) machine_mode s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) { - if (TARGET_VX - && register_operand (op0, DFmode) - && register_operand (op1, DFmode)) - { - /* LT, LE, UNGT, UNGE require swapping OP0 and OP1. Either - s390_emit_compare or s390_canonicalize_comparison will take - care of it. */ - switch (code) - { - case EQ: - case NE: - return CCVEQmode; - case GT: - case UNLE: - return CCVFHmode; - case GE: - case UNLT: - return CCVFHEmode; - default: - ; - } - } - switch (code) { case EQ: @@ -1703,26 +1680,6 @@ s390_canonicalize_comparison (int *code, rtx *op0, rtx *op1, *code = (int)swap_condition ((enum rtx_code)*code); } - /* Using the scalar variants of vector instructions for 64 bit FP - comparisons might require swapping the operands. */ - if (TARGET_VX - && register_operand (*op0, DFmode) - && register_operand (*op1, DFmode) - && (*code == LT || *code == LE || *code == UNGT || *code == UNGE)) - { - rtx tmp; - - switch (*code) - { - case LT: *code = GT; break; - case LE: *code = GE; break; - case UNGT: *code = UNLE; break; - case UNGE: *code = UNLT; break; - default: ; - } - tmp = *op0; *op0 = *op1; *op1 = tmp; - } - /* A comparison result is compared against zero. Replace it with the (perhaps inverted) original comparison. This probably should be done by simplify_relational_operation. */ @@ -1749,56 +1706,6 @@ s390_canonicalize_comparison (int *code, rtx *op0, rtx *op1, } } -/* Helper function for s390_emit_compare. If possible emit a 64 bit - FP compare using the single element variant of vector instructions. - Replace CODE with the comparison code to be used in the CC reg - compare and return the condition code register RTX in CC. */ - -static bool -s390_expand_vec_compare_scalar (enum rtx_code *code, rtx cmp1, rtx cmp2, - rtx *cc) -{ - machine_mode cmp_mode; - bool swap_p = false; - - switch (*code) - { - case EQ: cmp_mode = CCVEQmode; break; - case NE: cmp_mode = CCVEQmode; break; - case GT: cmp_mode = CCVFHmode; break; - case GE: cmp_mode = CCVFHEmode; break; - case UNLE: cmp_mode = CCVFHmode; break; - case UNLT: cmp_mode = CCVFHEmode; break; - case LT: cmp_mode = CCVFHmode; *code = GT; swap_p = true; break; - case LE: cmp_mode = CCVFHEmode; *code = GE; swap_p = true; break; - case UNGE: cmp_mode = CCVFHmode; *code = UNLE; swap_p = true; break; - case UNGT: cmp_mode = CCVFHEmode; *code = UNLT; swap_p = true; break; - default: return false; - } - - if (swap_p) - { - rtx tmp = cmp2; - cmp2 = cmp1; - cmp1 = tmp; - } - - emit_insn (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, - gen_rtx_SET (gen_rtx_REG (cmp_mode, CC_REGNUM), - gen_rtx_COMPARE (cmp_mode, cmp1, - cmp2)), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_SCRATCH (V2DImode))))); - - /* This is the cc reg how it will be used in the cc mode consumer. - It either needs to be CCVFALL or CCVFANY. However, CC1 will - never be set by the scalar variants. So it actually doesn't - matter which one we choose here. */ - *cc = gen_rtx_REG (CCVFALLmode, CC_REGNUM); - return true; -} - /* Emit a compare instruction suitable to implement the comparison OP0 CODE OP1. Return the correct condition RTL to be placed in @@ -1810,14 +1717,7 @@ s390_emit_compare (enum rtx_code code, rtx op0, rtx op1) machine_mode mode = s390_select_ccmode (code, op0, op1); rtx cc; - if (TARGET_VX - && register_operand (op0, DFmode) - && register_operand (op1, DFmode) - && s390_expand_vec_compare_scalar (&code, op0, op1, &cc)) - { - /* Work has been done by s390_expand_vec_compare_scalar already. */ - } - else if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) + if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) { /* Do not output a redundant compare instruction if a compare_and_swap pattern already computed the result and the diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 554fb37..e72d5be 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1317,28 +1317,20 @@ }) -; cxtr, cxbr, cdtr, cdbr, cebr, cdb, ceb +; cxtr, cdtr, cxbr, cdbr, cebr, cdb, ceb, wfcdb (define_insn "*cmp_ccs" [(set (reg CC_REGNUM) - (compare (match_operand:FP 0 "register_operand" "f,f") - (match_operand:FP 1 "general_operand" "f,R")))] + (compare (match_operand:FP 0 "register_operand" "f,f,v") + (match_operand:FP 1 "general_operand" "f,R,v")))] "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT" "@ cr\t%0,%1 - cb\t%0,%1" - [(set_attr "op_type" "RRE,RXE") - (set_attr "type" "fsimp") - (set_attr "enabled" "*,")]) - -; wfcedbs, wfchdbs, wfchedbs -(define_insn "*vec_cmpdf_cconly" - [(set (reg:VFCMP CC_REGNUM) - (compare:VFCMP (match_operand:DF 0 "register_operand" "v") - (match_operand:DF 1 "register_operand" "v"))) - (clobber (match_scratch:V2DI 2 "=v"))] - "TARGET_VX && TARGET_HARD_FLOAT" - "wfcdbs\t%v2,%v0,%v1" - [(set_attr "op_type" "VRR")]) + cb\t%0,%1 + wfcdb\t%0,%1" + [(set_attr "op_type" "RRE,RXE,VRR") + (set_attr "cpu_facility" "*,*,vx") + (set_attr "enabled" "*,,")]) + ; Compare and Branch instructions diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0f0877c..e6f0e2b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2017-03-24 Andreas Krebbel + * gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust for the + comparison instructions used from now on. + +2017-03-24 Andreas Krebbel + * gcc.target/s390/s390.exp (check_effective_target_vector): Include target-supports.exp and move target_vector check routine ... diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c index 46a261f..ea51d0c 100644 --- a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c @@ -6,48 +6,65 @@ int eq (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a == b; } -/* { dg-final { scan-assembler "eq:\n\twfcedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */ +/* { dg-final { scan-assembler "eq:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochine\t%r2,0" } } */ int ne (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a != b; } -/* { dg-final { scan-assembler "ne:\n\twfcedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochie\t%r2,0" } } */ +/* { dg-final { scan-assembler "ne:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochie\t%r2,0" } } */ int gt (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a > b; } -/* { dg-final { scan-assembler "gt:\n\twfchdbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */ +/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */ int ge (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a >= b; } -/* { dg-final { scan-assembler "ge:\n\twfchedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */ +/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */ int lt (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a < b; } -/* { dg-final { scan-assembler "lt:\n\twfchdbs\t%v\[0-9\]*,%v2,%v0\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */ +/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */ int le (double a, double b) { + asm ("" : : : + "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"); return a <= b; } -/* { dg-final { scan-assembler "le:\n\twfchedbs\t%v\[0-9\]*,%v2,%v0\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */ - +/* { dg-final { scan-assembler "le:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */