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[Committed] S/390: Add missing constraints in builtin patterns

Message ID 20170309075410.4806-1-krebbel@linux.vnet.ibm.com
State New
Headers show

Commit Message

Andreas Krebbel March 9, 2017, 7:54 a.m. UTC 
gcc/ChangeLog:

2017-03-09  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vx-builtins.md ("vfee<mode>", "vfeez<mode>")
	("vfenez<mode>"): Add missing constraints.
---
 gcc/config/s390/vx-builtins.md | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)
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Patch

diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 1e9010a..6aff378 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -1351,9 +1351,9 @@ 
 
 ; vfeeb, vfeeh, vfeef
 (define_insn "vfee<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-			   (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand"  "v")
 			   (const_int 0)]
 			  UNSPEC_VEC_VFEE))]
   "TARGET_VX"
@@ -1362,9 +1362,9 @@ 
 
 ; vfeezb, vfeezh, vfeezf
 (define_insn "vfeez<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-			   (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand"  "v")
 			   (const_int VSTRING_FLAG_ZS)]
 			  UNSPEC_VEC_VFEE))]
   "TARGET_VX"
@@ -1423,9 +1423,9 @@ 
 
 ; vfenezb, vfenezh, vfenezf
 (define_insn "vfenez<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-			   (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+	(unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+			   (match_operand:VI_HW_QHS 2 "register_operand"  "v")
 			   (const_int VSTRING_FLAG_ZS)]
 			  UNSPEC_VEC_VFENE))]
   "TARGET_VX"