From patchwork Thu Jan 19 11:18:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 717022 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3v41Yr0by5z9t1F for ; Thu, 19 Jan 2017 22:18:54 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="eMPxUuoj"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; q=dns; s=default; b=E1EKnxof4uLTbJdQha0+oEmuYKec4 Ze1gB49OqEo5Ur7NNLyQLUI1OAn/1twkXu+wyWMRiMCJ2WK3DCDI4LHwpHGya8Ey s2MoY14zAG/r1Ix5ceH57RKkPvQVO413gCi1Wp5yFobn716gV5WqAntj3z+sIRaX NgrZ4gNrXKx9eE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; s=default; bh=kVOuB3wGNbw904ZcKGNm5m/riD8=; b=eMP xUuojF86qPCueQfxGr/q/6H/TDMv6sa7TMtAVZJekrn+Ww/5RSHVvIhnsMh8ZeNO xnGZSCxIJ8HU4mkD69XWovHRHvkwYo4Wg17sg58c2L8dHd/hERJjIlba0a2tL5ld m8ny/1Mb4aluDtJbcOfVvOLsyC+PJ/RdldQkmnoI= Received: (qmail 129138 invoked by alias); 19 Jan 2017 11:18:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 129099 invoked by uid 89); 19 Jan 2017 11:18:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.1 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=43711, 437, 11 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 19 Jan 2017 11:18:41 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E9FEA3A7690; Thu, 19 Jan 2017 11:18:40 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-116-250.ams2.redhat.com [10.36.116.250]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v0JBIcoi020633 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Thu, 19 Jan 2017 06:18:40 -0500 Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id v0JBIaaY011811; Thu, 19 Jan 2017 12:18:36 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id v0JBIYeP011805; Thu, 19 Jan 2017 12:18:34 +0100 Date: Thu, 19 Jan 2017 12:18:34 +0100 From: Jakub Jelinek To: gcc-patches@gcc.gnu.org, fortran@gcc.gnu.org, JonY <10walls@gmail.com>, Kai Tietz , Uros Bizjak Cc: Rainer Emrich Subject: [PATCH] Fix libgfortran bootstrap error on x86_64-mingw32 (PR target/79127) Message-ID: <20170119111834.GH1867@tucnak> Reply-To: Jakub Jelinek MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.7.1 (2016-10-04) X-IsSubscribed: yes Hi! Apparently the Windows SEH has problems with the [xyz]mm16 and later registers that were added with AVX512F (usable in 64-bit code only), if any of the zmm16 to zmm31 registers are used in some function compiled with avx512f or later, GCC emits .seh_savexmm %xmm16, ... directive or similar and even binutils 2.27 doesn't handle that. I don't know where the bug is (if the SEH format even allows registers %xmm16 to %xmm31, what ABI is mingw meant to use for these registers (if they are meant to be call saved (like %xmm6 to %xmm15) or call used), and whether the bug is on the GCC side, or binutils side, or just that AVX512* can't be really used safely on mingw (perhaps a quick hack could be to make those registers fixed on mingw). This patch doesn't address anything from it, just attempts to fix the bootstrap problem by not using avx512f optimized code on mingw until that issue is resolved. The #ifdef __x86_64__ in there is because zmm16+ registers can only be used with -m64 or -mx32, not with -m32 (similarly to xmm8 to xmm15). Bootstrapped/regtested on x86_64-linux and i686-linux (where HAVE_AVX5412F is still defined as before assuming not very old binutils) and by Rainer as mentioned in the PR on x86_64-w64-mingw32, ok for trunk? 2017-01-19 Jakub Jelinek PR target/79127 * acinclude.m4 (LIBGFOR_CHECK_AVX512F): Ensure the test clobbers some zmm16+ registers to verify they are handled by unwind info properly if needed. * configure: Regenerated. Jakub --- libgfortran/acinclude.m4.jj 2016-12-05 10:28:28.000000000 +0100 +++ libgfortran/acinclude.m4 2017-01-18 16:36:23.360736182 +0100 @@ -437,7 +437,11 @@ AC_DEFUN([LIBGFOR_CHECK_AVX512F], [ typedef double __m512d __attribute__ ((__vector_size__ (64))); __m512d _mm512_add (__m512d a) { - return __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + __m512d b = __builtin_ia32_addpd512_mask (a, a, a, 1, 4); +#ifdef __x86_64__ + asm volatile ("" : : : "zmm16", "zmm17", "zmm18", "zmm19"); +#endif + return b; }]], [[]])], AC_DEFINE(HAVE_AVX512F, 1, [Define if AVX512f instructions can be compiled.]), --- libgfortran/configure.jj 2017-01-17 10:28:41.000000000 +0100 +++ libgfortran/configure 2017-01-18 16:36:28.592668260 +0100 @@ -26300,7 +26300,11 @@ rm -f core conftest.err conftest.$ac_obj typedef double __m512d __attribute__ ((__vector_size__ (64))); __m512d _mm512_add (__m512d a) { - return __builtin_ia32_addpd512_mask (a, a, a, 1, 4); + __m512d b = __builtin_ia32_addpd512_mask (a, a, a, 1, 4); +#ifdef __x86_64__ + asm volatile ("" : : : "zmm16", "zmm17", "zmm18", "zmm19"); +#endif + return b; } int main ()