From patchwork Wed Nov 23 05:19:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Santos X-Patchwork-Id: 698051 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tNrFl07l8z9srZ for ; Wed, 23 Nov 2016 16:18:02 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="DqjOnBLp"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=KUvRdwD1D+ifiN8fiWhGd+mPqTsopE3ncQEmUoTCfAQ6hqDQw9U5Y XD5SnA3mJdQpGS8qh5DHrpc8IegG/KHIJY+GTFkuzyBXm/hE5rAma6cSpSmzbelH /PNfd5Hzz6JLM1THnidZ12IgBLb/SVvtLaBGof93KY+PMsclpcViGg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=5Tf7nxN5V7klNIQunOhO2ndItlc=; b=DqjOnBLpoA8JRs7WgqMQ U5AXbnlCBscoqR+CGIZSKKAcABCI9/AWoDQ09kqT8eckwObesnlBpUBvTvpL72+W UIPihA71iD6i7xm+6y7LeiAoHiXPtMCOex2cFIBShQh1u9G/YbpA62Oh7I2olaXH kahatmPDI5lQy7X5+Qqo1VU= Received: (qmail 110624 invoked by alias); 23 Nov 2016 05:16:45 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 110433 invoked by uid 89); 23 Nov 2016 05:16:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.3 required=5.0 tests=AWL, BAYES_00, SPF_NEUTRAL autolearn=no version=3.3.2 spammy= X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 23 Nov 2016 05:16:33 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c9Pv0-0007jE-FZ for gcc-patches@gcc.gnu.org; Wed, 23 Nov 2016 00:16:31 -0500 Received: from pb-smtp2.pobox.com ([64.147.108.71]:53447 helo=sasl.smtp.pobox.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c9Pv0-0007il-Ax for gcc-patches@gcc.gnu.org; Wed, 23 Nov 2016 00:16:26 -0500 Received: from sasl.smtp.pobox.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 4B996514BD; Wed, 23 Nov 2016 00:16:22 -0500 (EST) Received: from pb-smtp2.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 43849514BC; Wed, 23 Nov 2016 00:16:22 -0500 (EST) Received: from localhost.localdomain (unknown [76.215.41.237]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by pb-smtp2.pobox.com (Postfix) with ESMTPSA id AE1FE514B8; Wed, 23 Nov 2016 00:16:20 -0500 (EST) From: Daniel Santos To: gcc-patches Cc: Daniel Santos Subject: [PATCH 5/9] Modify ix86_save_reg to optionally omit stub-managed registers Date: Tue, 22 Nov 2016 23:19:14 -0600 Message-Id: <20161123051918.22517-5-daniel.santos@pobox.com> In-Reply-To: <25abd41b-923b-2fea-dfc3-9051af632f44@pobox.com> References: <25abd41b-923b-2fea-dfc3-9051af632f44@pobox.com> X-Pobox-Relay-ID: F8E7F05E-B13B-11E6-A7B9-B2917B1B28F4-06139138!pb-smtp2.pobox.com X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 64.147.108.71 X-IsSubscribed: yes Adds static HARD_REG_SET stub_managed_regs to track registers that will be managed by the pro/epilogue stubs for the function. Adds a third parameter bool ignore_outlined to ix86_save_reg to specify rather or not the count should include registers marked in stub_managed_regs. --- gcc/config/i386/i386.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 40f9acf..f661b3f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -12294,10 +12294,14 @@ ix86_hard_regno_scratch_ok (unsigned int regno) && df_regs_ever_live_p (regno))); } +/* Registers who's save & restore will be managed by stubs called from + pro/epilogue (inited in ix86_compute_frame_layout). */ +static HARD_REG_SET GTY(()) stub_managed_regs; + /* Return TRUE if we need to save REGNO. */ static bool -ix86_save_reg (unsigned int regno, bool maybe_eh_return) +ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined) { /* If there are no caller-saved registers, we preserve all registers, except for MMX and x87 registers which aren't supported when saving @@ -12365,6 +12369,10 @@ ix86_save_reg (unsigned int regno, bool maybe_eh_return) } } + if (ignore_outlined && cfun->machine->outline_ms_sysv + && in_hard_reg_set_p (stub_managed_regs, DImode, regno)) + return false; + if (crtl->drap_reg && regno == REGNO (crtl->drap_reg) && !cfun->machine->no_drap_save_restore) @@ -12385,7 +12393,7 @@ ix86_nsaved_regs (void) int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, false)) nregs ++; return nregs; } @@ -12401,7 +12409,7 @@ ix86_nsaved_sseregs (void) if (!TARGET_64BIT_MS_ABI) return 0; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, false)) nregs ++; return nregs; } @@ -12481,6 +12489,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame) frame->nregs = ix86_nsaved_regs (); frame->nsseregs = ix86_nsaved_sseregs (); + CLEAR_HARD_REG_SET (stub_managed_regs); /* 64-bit MS ABI seem to require stack alignment to be always 16, except for function prologues, leaf functions and when the defult @@ -12792,7 +12801,7 @@ ix86_emit_save_regs (void) rtx_insn *insn; for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno))); RTX_FRAME_RELATED_P (insn) = 1; @@ -12874,7 +12883,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset); cfa_offset -= UNITS_PER_WORD; @@ -12889,7 +12898,7 @@ ix86_emit_save_sse_regs_using_mov (HOST_WIDE_INT cfa_offset) unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { ix86_emit_save_reg_using_mov (V4SFmode, regno, cfa_offset); cfa_offset -= GET_MODE_SIZE (V4SFmode); @@ -13269,13 +13278,13 @@ get_scratch_register_on_entry (struct scratch_reg *sr) && !static_chain_p && drap_regno != CX_REG) regno = CX_REG; - else if (ix86_save_reg (BX_REG, true)) + else if (ix86_save_reg (BX_REG, true, false)) regno = BX_REG; /* esi is the static chain register. */ else if (!(regparm == 3 && static_chain_p) - && ix86_save_reg (SI_REG, true)) + && ix86_save_reg (SI_REG, true, false)) regno = SI_REG; - else if (ix86_save_reg (DI_REG, true)) + else if (ix86_save_reg (DI_REG, true, false)) regno = DI_REG; else { @@ -14376,7 +14385,7 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true)) { rtx reg = gen_rtx_REG (word_mode, regno); rtx mem; @@ -14415,7 +14424,7 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset, unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true)) { rtx reg = gen_rtx_REG (V4SFmode, regno); rtx mem;