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Violators will be prosecuted; Thu, 11 Aug 2016 17:15:19 -0600 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: meissner@ibm-tiger.the-meissners.org Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 251263E4003E; Thu, 11 Aug 2016 17:15:19 -0600 (MDT) Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u7BNFNAn55640114; Thu, 11 Aug 2016 23:15:23 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A0FF7AC03F; Thu, 11 Aug 2016 19:15:18 -0400 (EDT) Received: from ibm-tiger.the-meissners.org (unknown [9.32.77.111]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 7BB6BAC046; Thu, 11 Aug 2016 19:15:18 -0400 (EDT) Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id D94AE45CDA; Thu, 11 Aug 2016 19:15:17 -0400 (EDT) Date: Thu, 11 Aug 2016 19:15:17 -0400 From: Michael Meissner To: Michael Meissner , Segher Boessenkool , gcc-patches@gcc.gnu.org, David Edelsohn , Bill Schmidt Subject: [PATCH], Patch #4, Improve vector int/long initialization on PowerPC Mail-Followup-To: Michael Meissner , Segher Boessenkool , gcc-patches@gcc.gnu.org, David Edelsohn , Bill Schmidt References: <20160804043344.GA8391@ibm-tiger.the-meissners.org> <20160804150336.GA22744@gate.crashing.org> <20160808225520.GA29239@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20160808225520.GA29239@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16081123-0004-0000-0000-0000101EA8C1 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00005579; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000181; SDB=6.00743381; UDB=6.00350042; IPR=6.00515927; BA=6.00004658; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00012317; XFM=3.00000011; UTC=2016-08-11 23:15:20 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16081123-0005-0000-0000-000077E812F6 Message-Id: <20160811231517.GA2148@ibm-tiger.the-meissners.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-08-11_15:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608110300 X-IsSubscribed: yes This patch was originally part of patch #3, but I separated it out as I rework what used to be part of patch #3 to fix some issues. This patch adds support for using the ISA 3.0 MTVSRDD instruction when initializing vector long vectors with variables. I also changed the CPU type of the other use of MTVSRDD to be vecperm as Pat suggested. I added two general tests (vec-init-1.c and vec-init-2.c) that test various forms of vector initialization to make sure the compiler generates the correct code. These tests will test optimizations that the future patches will enhance. I also added a third test (vec-init-3.c) to specifically test whether MTVSRDD is generated. I did a bootstrap and make check on a little endian power8 system, and there were no regressions. Can I install this patch to the trunk? [gcc] 2016-08-11 Michael Meissner * config/rs6000/vsx.md (vsx_concat_): Add support for the ISA 3.0 MTVSRDD instruction. (vsx_splat_): Change cpu type of MTVSRDD instruction to vecperm. [gcc/testsuite] 2016-08-11 Michael Meissner * gcc.target/powerpc/vec-init-1.c: New tests to test various vector initialization options. * gcc.target/powerpc/vec-init-2.c: Likewise. * gcc.target/powerpc/vec-init-3.c: New test to make sure MTVSRDD is generated on ISA 3.0. Index: gcc/config/rs6000/rs6000.c =================================================================== Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md (.../svn+ssh://meissner@gcc.gnu.org/svn/gcc/trunk/gcc/config/rs6000) (revision 239334) +++ gcc/config/rs6000/vsx.md (.../gcc/config/rs6000) (working copy) @@ -1911,16 +1911,24 @@ (define_insn "*vsx_float_fix_v2df2" ;; Build a V2DF/V2DI vector from two scalars (define_insn "vsx_concat_" - [(set (match_operand:VSX_D 0 "vsx_register_operand" "=,?") + [(set (match_operand:VSX_D 0 "gpc_reg_operand" "=,we") (vec_concat:VSX_D - (match_operand: 1 "vsx_register_operand" ",") - (match_operand: 2 "vsx_register_operand" ",")))] + (match_operand: 1 "gpc_reg_operand" ",r") + (match_operand: 2 "gpc_reg_operand" ",r")))] "VECTOR_MEM_VSX_P (mode)" { - if (BYTES_BIG_ENDIAN) - return "xxpermdi %x0,%x1,%x2,0"; + if (which_alternative == 0) + return (BYTES_BIG_ENDIAN + ? "xxpermdi %x0,%x1,%x2,0" + : "xxpermdi %x0,%x2,%x1,0"); + + else if (which_alternative == 1) + return (BYTES_BIG_ENDIAN + ? "mtvsrdd %x0,%1,%2" + : "mtvsrdd %x0,%2,%1"); + else - return "xxpermdi %x0,%x2,%x1,0"; + gcc_unreachable (); } [(set_attr "type" "vecperm")]) @@ -2650,7 +2658,7 @@ (define_insn "vsx_splat_" xxpermdi %x0,%x1,%x1,0 lxvdsx %x0,%y1 mtvsrdd %x0,%1,%1" - [(set_attr "type" "vecperm,vecload,mftgpr")]) + [(set_attr "type" "vecperm,vecload,vecperm")]) ;; V4SI splat (ISA 3.0) ;; When SI's are allowed in VSX registers, add XXSPLTW support Index: gcc/testsuite/gcc.target/powerpc/vec-init-1.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vec-init-1.c (.../svn+ssh://meissner@gcc.gnu.org/svn/gcc/trunk/gcc/testsuite/gcc.target/powerpc) (revision 0) +++ gcc/testsuite/gcc.target/powerpc/vec-init-1.c (.../gcc/testsuite/gcc.target/powerpc) (revision 239334) @@ -0,0 +1,169 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-options "-O2 -mvsx" } */ + +#include +#include +#include + +#define ELEMENTS -1, 2, 0, -123456 +#define SPLAT 0x01234567 + +vector int sv = (vector int) { ELEMENTS }; +vector int splat = (vector int) { SPLAT, SPLAT, SPLAT, SPLAT }; +vector int sv_global, sp_global; +static vector int sv_static, sp_static; +static const int expected[] = { ELEMENTS }; + +extern void check (vector int a) + __attribute__((__noinline__)); + +extern void check_splat (vector int a) + __attribute__((__noinline__)); + +extern vector int pack_reg (int a, int b, int c, int d) + __attribute__((__noinline__)); + +extern vector int pack_const (void) + __attribute__((__noinline__)); + +extern void pack_ptr (vector int *p, int a, int b, int c, int d) + __attribute__((__noinline__)); + +extern void pack_static (int a, int b, int c, int d) + __attribute__((__noinline__)); + +extern void pack_global (int a, int b, int c, int d) + __attribute__((__noinline__)); + +extern vector int splat_reg (int a) + __attribute__((__noinline__)); + +extern vector int splat_const (void) + __attribute__((__noinline__)); + +extern void splat_ptr (vector int *p, int a) + __attribute__((__noinline__)); + +extern void splat_static (int a) + __attribute__((__noinline__)); + +extern void splat_global (int a) + __attribute__((__noinline__)); + +void +check (vector int a) +{ + size_t i; + + for (i = 0; i < 4; i++) + if (vec_extract (a, i) != expected[i]) + abort (); +} + +void +check_splat (vector int a) +{ + size_t i; + + for (i = 0; i < 4; i++) + if (vec_extract (a, i) != SPLAT) + abort (); +} + +vector int +pack_reg (int a, int b, int c, int d) +{ + return (vector int) { a, b, c, d }; +} + +vector int +pack_const (void) +{ + return (vector int) { ELEMENTS }; +} + +void +pack_ptr (vector int *p, int a, int b, int c, int d) +{ + *p = (vector int) { a, b, c, d }; +} + +void +pack_static (int a, int b, int c, int d) +{ + sv_static = (vector int) { a, b, c, d }; +} + +void +pack_global (int a, int b, int c, int d) +{ + sv_global = (vector int) { a, b, c, d }; +} + +vector int +splat_reg (int a) +{ + return (vector int) { a, a, a, a }; +} + +vector int +splat_const (void) +{ + return (vector int) { SPLAT, SPLAT, SPLAT, SPLAT }; +} + +void +splat_ptr (vector int *p, int a) +{ + *p = (vector int) { a, a, a, a }; +} + +void +splat_static (int a) +{ + sp_static = (vector int) { a, a, a, a }; +} + +void +splat_global (int a) +{ + sp_global = (vector int) { a, a, a, a }; +} + +int main (void) +{ + vector int sv2, sv3; + + check (sv); + + check (pack_reg (ELEMENTS)); + + check (pack_const ()); + + pack_ptr (&sv2, ELEMENTS); + check (sv2); + + pack_static (ELEMENTS); + check (sv_static); + + pack_global (ELEMENTS); + check (sv_global); + + check_splat (splat); + + check_splat (splat_reg (SPLAT)); + + check_splat (splat_const ()); + + splat_ptr (&sv2, SPLAT); + check_splat (sv2); + + splat_static (SPLAT); + check_splat (sp_static); + + splat_global (SPLAT); + check_splat (sp_global); + + return 0; +} Index: gcc/testsuite/gcc.target/powerpc/vec-init-2.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vec-init-2.c (.../svn+ssh://meissner@gcc.gnu.org/svn/gcc/trunk/gcc/testsuite/gcc.target/powerpc) (revision 0) +++ gcc/testsuite/gcc.target/powerpc/vec-init-2.c (.../gcc/testsuite/gcc.target/powerpc) (revision 239334) @@ -0,0 +1,169 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-options "-O2 -mvsx" } */ + +#include +#include +#include + +#define ELEMENTS -12345678L, 9L +#define SPLAT 0x0123456789ABCDE + +vector long sv = (vector long) { ELEMENTS }; +vector long splat = (vector long) { SPLAT, SPLAT }; +vector long sv_global, sp_global; +static vector long sv_static, sp_static; +static const int expected[] = { ELEMENTS }; + +extern void check (vector long a) + __attribute__((__noinline__)); + +extern void check_splat (vector long a) + __attribute__((__noinline__)); + +extern vector long pack_reg (long a, long b) + __attribute__((__noinline__)); + +extern vector long pack_const (void) + __attribute__((__noinline__)); + +extern void pack_ptr (vector long *p, long a, long b) + __attribute__((__noinline__)); + +extern void pack_static (long a, long b) + __attribute__((__noinline__)); + +extern void pack_global (long a, long b) + __attribute__((__noinline__)); + +extern vector long splat_reg (long a) + __attribute__((__noinline__)); + +extern vector long splat_const (void) + __attribute__((__noinline__)); + +extern void splat_ptr (vector long *p, long a) + __attribute__((__noinline__)); + +extern void splat_static (long a) + __attribute__((__noinline__)); + +extern void splat_global (long a) + __attribute__((__noinline__)); + +void +check (vector long a) +{ + size_t i; + + for (i = 0; i < 2; i++) + if (vec_extract (a, i) != expected[i]) + abort (); +} + +void +check_splat (vector long a) +{ + size_t i; + + for (i = 0; i < 2; i++) + if (vec_extract (a, i) != SPLAT) + abort (); +} + +vector long +pack_reg (long a, long b) +{ + return (vector long) { a, b }; +} + +vector long +pack_const (void) +{ + return (vector long) { ELEMENTS }; +} + +void +pack_ptr (vector long *p, long a, long b) +{ + *p = (vector long) { a, b }; +} + +void +pack_static (long a, long b) +{ + sv_static = (vector long) { a, b }; +} + +void +pack_global (long a, long b) +{ + sv_global = (vector long) { a, b }; +} + +vector long +splat_reg (long a) +{ + return (vector long) { a, a }; +} + +vector long +splat_const (void) +{ + return (vector long) { SPLAT, SPLAT }; +} + +void +splat_ptr (vector long *p, long a) +{ + *p = (vector long) { a, a }; +} + +void +splat_static (long a) +{ + sp_static = (vector long) { a, a }; +} + +void +splat_global (long a) +{ + sp_global = (vector long) { a, a }; +} + +int main (void) +{ + vector long sv2, sv3; + + check (sv); + + check (pack_reg (ELEMENTS)); + + check (pack_const ()); + + pack_ptr (&sv2, ELEMENTS); + check (sv2); + + pack_static (ELEMENTS); + check (sv_static); + + pack_global (ELEMENTS); + check (sv_global); + + check_splat (splat); + + check_splat (splat_reg (SPLAT)); + + check_splat (splat_const ()); + + splat_ptr (&sv2, SPLAT); + check_splat (sv2); + + splat_static (SPLAT); + check_splat (sp_static); + + splat_global (SPLAT); + check_splat (sp_global); + + return 0; +} Index: gcc/testsuite/gcc.target/powerpc/vec-init-3.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vec-init-3.c (.../svn+ssh://meissner@gcc.gnu.org/svn/gcc/trunk/gcc/testsuite/gcc.target/powerpc) (revision 0) +++ gcc/testsuite/gcc.target/powerpc/vec-init-3.c (.../gcc/testsuite/gcc.target/powerpc) (revision 239334) @@ -0,0 +1,12 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2 -mupper-regs-di" } */ + +vector long +merge (long a, long b) +{ + return (vector long) { a, b }; +} + +/* { dg-final { scan-assembler "mtvsrdd" } } */