diff mbox

[RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE

Message ID 20160503145224.GP18915@bubble.grove.modra.org
State New
Headers show

Commit Message

Alan Modra May 3, 2016, 2:52 p.m. UTC
Fixes an ICE found when using odd options.  Bootstrapped and
regression tested both powerpc64-linux and powerpc64le-linux.  OK to
apply?

gcc/
	PR target/70866
	* config/rs6000/rs6000.c (rs6000_stack_info): Don't set cr_save_p
	when cr2,3,4 are all fixed regs.
gcc/testsuite/
	* gcc.target/powerpc/pr70866.c: New.

Comments

Segher Boessenkool May 3, 2016, 3:22 p.m. UTC | #1
On Wed, May 04, 2016 at 12:22:24AM +0930, Alan Modra wrote:
> Fixes an ICE found when using odd options.  Bootstrapped and
> regression tested both powerpc64-linux and powerpc64le-linux.  OK to
> apply?
> 
> gcc/
> 	PR target/70866
> 	* config/rs6000/rs6000.c (rs6000_stack_info): Don't set cr_save_p
> 	when cr2,3,4 are all fixed regs.
> gcc/testsuite/
> 	* gcc.target/powerpc/pr70866.c: New.

This one seems obvious enough (I'll have to think about your other patch).
Have you tested if save and restore are correct now?  I.e. not touching
the fixed ones.  In either case, this should improve things, please apply.


Segher
Alan Modra May 3, 2016, 11:45 p.m. UTC | #2
On Tue, May 03, 2016 at 10:22:02AM -0500, Segher Boessenkool wrote:
> Have you tested if save and restore are correct now?  I.e. not touching
> the fixed ones.

It doesn't matter if we save more cr fields than needed, and I think
the epilogue restores are good.  Restores done by the unwinder won't
be correct except for ELFv2, because on other ABIs we emit a single
save of cr2 to .eh_frame to mean the whole cr is saved.  There's not
much we can do about that.
Segher Boessenkool May 4, 2016, 12:33 a.m. UTC | #3
On Wed, May 04, 2016 at 09:15:20AM +0930, Alan Modra wrote:
> On Tue, May 03, 2016 at 10:22:02AM -0500, Segher Boessenkool wrote:
> > Have you tested if save and restore are correct now?  I.e. not touching
> > the fixed ones.
> 
> It doesn't matter if we save more cr fields than needed,

Right, currently we store all CR fields with movesi_from_cr, and that
hinders shrink-wrapping a lot.  As long as rs6000_emit_move_from_cr
has the correct information (and it should anyway, for elfv2), I am
happy :-)

Thanks for checking,


Segher
diff mbox

Patch

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 812d3bc..e94aa66 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -23702,9 +23702,9 @@  rs6000_stack_info (void)
   info->calls_p = (!crtl->is_leaf || cfun->machine->ra_needs_full_frame);
 
   /* Determine if we need to save the condition code registers.  */
-  if (df_regs_ever_live_p (CR2_REGNO)
-      || df_regs_ever_live_p (CR3_REGNO)
-      || df_regs_ever_live_p (CR4_REGNO))
+  if (save_reg_p (CR2_REGNO)
+      || save_reg_p (CR3_REGNO)
+      || save_reg_p (CR4_REGNO))
     {
       info->cr_save_p = 1;
       if (DEFAULT_ABI == ABI_V4)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70866.c b/gcc/testsuite/gcc.target/powerpc/pr70866.c
new file mode 100644
index 0000000..25fd05a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70866.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-ffixed-cr2 -ffixed-cr3 -ffixed-cr4" } */
+
+#define SET_CR(R,V) __asm__ __volatile__ ("mtcrf %0,%1" : : "n" (1<<(7-R)), "r" (V<<(4*(7-R))) : "cr" #R)
+
+void foo (void)
+{
+  SET_CR (2, 7);
+  SET_CR (3, 8);
+  SET_CR (4, 9);
+}