From patchwork Thu Dec 31 20:41:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 561983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 65175140B99 for ; Fri, 1 Jan 2016 07:41:35 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=MLRzOVWt; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; q=dns; s= default; b=pd798UMpD2sOWeA7f+OXQl6o5Cash+8w+GkJloo4dhTcW45cp/wze Ec1ctN0aCRwjG/to0O82egE+OPMicQRU+aM7jjxlPp+PoKAu3CIbnQqPVUgIA1R2 Lye8JsU3IfuYtrUmHWl7JnQqdXzYMKRxUKTJTSStT+K+9wXQTo/slg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; s= default; bh=v9KfL+CTXJCcved21u0EDFtwixg=; b=MLRzOVWtrjW1B/iZj3rP uqgCzFn0Dz/kGGfT7rZk7gOAZS9Khi4Z2Gw4PEhZ8ZrMgbJHizFolN42fe/0OWG/ gEhVKXzTbHI9iZnre1mjWv6/WrJOyvorEaPITwu7ND9uTwtD62uUtwJo8rEnOrqB l7kWXyhgywlwkDPQkG7KOjk= Received: (qmail 96750 invoked by alias); 31 Dec 2015 20:41:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 96732 invoked by uid 89); 31 Dec 2015 20:41:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.7 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=King, meissnerlinuxvnetibmcom, meissner@linux.vnet.ibm.com, 978 X-HELO: e19.ny.us.ibm.com Received: from e19.ny.us.ibm.com (HELO e19.ny.us.ibm.com) (129.33.205.209) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Thu, 31 Dec 2015 20:41:26 +0000 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 31 Dec 2015 15:41:21 -0500 X-IBM-Helo: d01dlp01.pok.ibm.com X-IBM-MailFrom: meissner@ibm-tiger.the-meissners.org X-IBM-RcptTo: gcc-patches@gcc.gnu.org Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by d01dlp01.pok.ibm.com (Postfix) with ESMTP id E61E738C8039 for ; Thu, 31 Dec 2015 15:41:20 -0500 (EST) Received: from d01av04.pok.ibm.com (d01av04.pok.ibm.com [9.56.224.64]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id tBVKfKYt23593096 for ; Thu, 31 Dec 2015 20:41:20 GMT Received: from d01av04.pok.ibm.com (localhost [127.0.0.1]) by d01av04.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id tBVKfKnm004255 for ; Thu, 31 Dec 2015 15:41:20 -0500 Received: from ibm-tiger.the-meissners.org (dhcp-9-32-77-111.usma.ibm.com [9.32.77.111]) by d01av04.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id tBVKfK9J004240; Thu, 31 Dec 2015 15:41:20 -0500 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id DA21445F4F; Thu, 31 Dec 2015 15:41:19 -0500 (EST) Date: Thu, 31 Dec 2015 15:41:19 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com Subject: [PATCH], PowerPC, Add -mpower9-dform to switches turned on with -mcpu=power9 Message-ID: <20151231204119.GA8942@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15123120-0057-0000-0000-0000030D7DB9 X-IsSubscribed: yes When I did the inital d-form support for ISA 3.0 (power9) for loading scalar SF/DF values into Altivec registers, I did not enable -mpower9-dform with the other ISA 3.0 switches when you used -mcpu=power9. This was during the initial development, I had some bugs. I fixed the bugs, but I forgot to enable the d-form addressing support. This patch enables that default. I have built all of Spec 2006 with this option, and there were no failures. I did not do the full bootstrap/make check right now, but I have done it in the past with no regressions. Is it ok to install this patch? 2015-12-31 Michael Meissner * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add OPTION_MASK_P9_DFORM. (Note, at some point there will be patches to enable using d-form addressing with 128-bit vector types, but those patches aren't ready yet). Index: gcc/config/rs6000/rs6000-cpus.def =================================================================== --- gcc/config/rs6000/rs6000-cpus.def (revision 232017) +++ gcc/config/rs6000/rs6000-cpus.def (working copy) @@ -67,6 +67,7 @@ | OPTION_MASK_ISEL \ | OPTION_MASK_MODULO \ | OPTION_MASK_P9_FUSION \ + | OPTION_MASK_P9_DFORM \ | OPTION_MASK_P9_VECTOR) #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)