| Message ID | 20151218102138.GA25456@linux.vnet.ibm.com |
|---|---|
| State | New |
| Headers | show |
On 12/18/2015 11:21 AM, Dominik Vogt wrote:
> Latest patch for r2 to r4, including a test case.
gcc/ChangeLog
* config/s390/s390.c (s390_init_frame_layout): Try r4 to r2 for the
literal pool pointer.
gcc/testsuite/ChangeLog
* gcc.target/s390/litpool-r3-1.c: New test.
Applied. Thanks!
-Andreas-
On Fri, Dec 18, 2015 at 11:21:38AM +0100, Dominik Vogt wrote: > Latest patch for r2 to r4, including a test case. > diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c > index ed684af..cba88bb 100644 > --- a/gcc/config/s390/s390.c > +++ b/gcc/config/s390/s390.c > @@ -9584,10 +9584,17 @@ s390_init_frame_layout (void) > as base register to avoid save/restore overhead. */ > if (!base_used) > cfun->machine->base_reg = NULL_RTX; > - else if (crtl->is_leaf && !df_regs_ever_live_p (5)) > - cfun->machine->base_reg = gen_rtx_REG (Pmode, 5); > else > - cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM); > + { > + int br = 0; > + > + if (crtl->is_leaf) > + /* Prefer r5 (most likely to be free). */ > + for (br = 5; br >= 2 && df_regs_ever_live_p (br); br--) > + ; > + cfun->machine->base_reg = > + gen_rtx_REG (Pmode, (br > 0) ? br : BASE_REGNUM); Note the formatting is wrong. It should be: cfun->machine->base_reg = gen_rtx_REG (Pmode, (br > 0) ? br : BASE_REGNUM); Jakub
From 67073c8b769e857d709f5e613919a6fe0120202e Mon Sep 17 00:00:00 2001 From: Dominik Vogt <vogt@linux.vnet.ibm.com> Date: Fri, 11 Dec 2015 11:33:23 +0100 Subject: [PATCH] S/390: Allow to use r2 to r4 as literal pool base pointer. The old code only considered r5 and r13. --- gcc/config/s390/s390.c | 13 ++++++++++--- gcc/testsuite/gcc.target/s390/litpool-r3-1.c | 16 ++++++++++++++++ 2 files changed, 26 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/s390/litpool-r3-1.c diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index ed684af..cba88bb 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -9584,10 +9584,17 @@ s390_init_frame_layout (void) as base register to avoid save/restore overhead. */ if (!base_used) cfun->machine->base_reg = NULL_RTX; - else if (crtl->is_leaf && !df_regs_ever_live_p (5)) - cfun->machine->base_reg = gen_rtx_REG (Pmode, 5); else - cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM); + { + int br = 0; + + if (crtl->is_leaf) + /* Prefer r5 (most likely to be free). */ + for (br = 5; br >= 2 && df_regs_ever_live_p (br); br--) + ; + cfun->machine->base_reg = + gen_rtx_REG (Pmode, (br > 0) ? br : BASE_REGNUM); + } s390_register_info (); s390_frame_info (); diff --git a/gcc/testsuite/gcc.target/s390/litpool-r3-1.c b/gcc/testsuite/gcc.target/s390/litpool-r3-1.c new file mode 100644 index 0000000..8ee50cf --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/litpool-r3-1.c @@ -0,0 +1,16 @@ +/* Validate that r3 may be used as the literal pool pointer. Test that only on + 64-bit for z900 to simplify the test. It's not really different on 31-bit + or other cpus. */ + +/* { dg-do compile { target { lp64 } } } */ +/* { dg-options "-march=z900 -O2" } */ + +__int128 gi; +const int c = 0x12345678u; +int foo(void) +{ + gi += c; + return c; +} + +/* { dg-final { scan-assembler-times "\tlarl\t%r3,.L3" 1 } } */ -- 2.3.0