diff mbox

[AArch64] Remove separate movtf pattern - Use an iterator for all FP modes.

Message ID 20150724154013.GA26513@e105545-lin
State New
Headers show

Commit Message

Ramana Radhakrishnan July 24, 2015, 3:40 p.m. UTC
Hi,

movtf is unnecessary as a separate expander. Move this to be with
the standard scalar floating point expanders.

Achieved by adding a new iterator and then using the same.

Tested cross aarch64-none-elf and no regressions.

Ramana

	* config/aarch64/aarch.md (mov<mode>:GPF): Use ALLTF.
  	(movtf): Delete.
 	* config/aarch64/iterators.md (ALLTF): New.


---
 gcc/config/aarch64/aarch64.md   | 22 ++--------------------
 gcc/config/aarch64/iterators.md |  3 +++
 2 files changed, 5 insertions(+), 20 deletions(-)
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index f264534..66fd9ca 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -978,8 +978,8 @@ 
 })
 
 (define_expand "mov<mode>"
-  [(set (match_operand:GPF 0 "nonimmediate_operand" "")
-	(match_operand:GPF 1 "general_operand" ""))]
+  [(set (match_operand:ALLTF 0 "nonimmediate_operand" "")
+	(match_operand:ALLTF 1 "general_operand" ""))]
   ""
   {
     if (!TARGET_FLOAT)
@@ -1033,24 +1033,6 @@ 
                      f_loadd,f_stored,load1,store1,mov_reg")]
 )
 
-(define_expand "movtf"
-  [(set (match_operand:TF 0 "nonimmediate_operand" "")
-	(match_operand:TF 1 "general_operand" ""))]
-  ""
-  {
-    if (!TARGET_FLOAT)
-      {
-	aarch64_err_no_fpadvsimd (TFmode, "code");
-	FAIL;
-      }
-
-    if (GET_CODE (operands[0]) == MEM
-        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
-	      && aarch64_float_const_zero_rtx_p (operands[1])))
-      operands[1] = force_reg (TFmode, operands[1]);
-  }
-)
-
 (define_insn "*movtf_aarch64"
   [(set (match_operand:TF 0
 	 "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump,Ump")
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index b19d3d7..c304d5c 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -38,6 +38,9 @@ 
 ;; Iterator for General Purpose Floating-point registers (32- and 64-bit modes)
 (define_mode_iterator GPF [SF DF])
 
+;; Iterator for all scalar floating point modes (SF, DF and TF)
+(define_mode_iterator ALLTF [SF DF TF])
+
 ;; Integer vector modes.
 (define_mode_iterator VDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI])