From patchwork Wed May 6 09:50:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Modra X-Patchwork-Id: 468706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C797F1402C6 for ; Wed, 6 May 2015 19:51:16 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=vy8KaMTz; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=ePz/BUri90WiZ6AagotC1SH+1AK0bS/uIKGUzfdiRPRgEcgrxR OkImM5jzXLEwXfuv2KU8icg/wDUE0FYWSMxD2ssvB4+fZ74f1um0G5UyYocfgODf a3t4AghC0mY0s4ipSBm4I99qAxxz5vTVzALG9xF4nOS8KOvdiZs+my7Ew= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=r7NAkxwX7Mcbq5TvCAnyyn3cU8c=; b=vy8KaMTzs/j5JALxLpfB O4tpNb8kMAwi9xCmWtXm+rK2WuAmnFTcguYtvS6B00fXatICuVU+xMnnlpRWOwkY 0tAFIBft4sZ5KJWMZTtKvurdrd2rnTpcqzv7j7z4Vh5PjKXp3z0jZZnXyZRNfDEV pUbfZkZVhx1isBeEwaKFQvA= Received: (qmail 98811 invoked by alias); 6 May 2015 09:51:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 98780 invoked by uid 89); 6 May 2015 09:51:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f182.google.com Received: from mail-pd0-f182.google.com (HELO mail-pd0-f182.google.com) (209.85.192.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 06 May 2015 09:51:05 +0000 Received: by pdbqd1 with SMTP id qd1so4898948pdb.2 for ; Wed, 06 May 2015 02:51:03 -0700 (PDT) X-Received: by 10.68.218.9 with SMTP id pc9mr58866047pbc.2.1430905863207; Wed, 06 May 2015 02:51:03 -0700 (PDT) Received: from bubble.grove.modra.org (CPE-58-160-155-134.oycza5.sa.bigpond.net.au. [58.160.155.134]) by mx.google.com with ESMTPSA id bn7sm1434521pac.22.2015.05.06.02.51.01 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 May 2015 02:51:02 -0700 (PDT) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 4D059EAF2A3; Wed, 6 May 2015 19:20:57 +0930 (ACST) Date: Wed, 6 May 2015 19:20:57 +0930 From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: David Edelsohn Subject: [RS6000] Fix PR66020, -mprofile-kernel related Message-ID: <20150506095057.GE6140@bubble.grove.modra.org> Mail-Followup-To: gcc-patches@gcc.gnu.org, David Edelsohn MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes -mprofile-kernel changed recently to not save lr on the stack before calling _mcount. This means a change is required in the _mcount used by one of the powerpc64 tests to grab function parameter registers. While fixing that, I noticed that the asm defined the _mcount label, which is a bit rude; A function in ELFv1 is supposed to be defined on an OPD entry. Using an alias fixes this problem. Also, _mcount used r11, the static chain pointer. That doesn't really hurt here, but I thought it was poor form to have such an example of _mcount tricks in the testsuite. Finally, I made gparms volatile since it does change behind gcc's back. Bootstrapped and regression tested powerpc64-linux and powerpc64le-linux. PR target/66020 * gcc.target/powerpc/ppc64-abi-2.c (my_mcount): Rewrite. (gparms): Make volatile. Remove trailing whitespace. Index: gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (revision 222842) +++ gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c (working copy) @@ -24,72 +24,69 @@ typedef struct vector int vrs[12]; } reg_parms_t; -reg_parms_t gparms; +volatile reg_parms_t gparms; /* _mcount call is done on Linux ppc64 early in the prologue. my_mcount will provide a entry point _mcount, - which will save all register to gparms. - Note that _mcount need to restore lr to original value, - therefor use ctr to return. + which will save all parameter registers to gparms. + Note that _mcount needs to restore lr to original value, + therefore use ctr to return. */ -void __attribute__((no_instrument_function)) -my_mcount() +extern void my_mcount (void) asm ("_mcount"); +void __attribute__((no_instrument_function, no_split_stack)) +my_mcount (void) { - asm volatile (".type _mcount,@function\n\t" - ".globl _mcount\n\t" - "_mcount:\n\t" - "mflr 0\n\t" - "mtctr 0\n\t" - "ld 0,16(1)\n\t" + asm volatile ("mflr 12\n\t" + "mtctr 12\n\t" "mtlr 0\n\t" - "ld 11,gparms@got(2)\n\t" - "std 3,0(11)\n\t" - "std 4,8(11)\n\t" - "std 5,16(11)\n\t" - "std 6,24(11)\n\t" - "std 7,32(11)\n\t" - "std 8,40(11)\n\t" - "std 9,48(11)\n\t" - "std 10,56(11)\n\t" - "stfd 1,64(11)\n\t" - "stfd 2,72(11)\n\t" - "stfd 3,80(11)\n\t" - "stfd 4,88(11)\n\t" - "stfd 5,96(11)\n\t" - "stfd 6,104(11)\n\t" - "stfd 7,112(11)\n\t" - "stfd 8,120(11)\n\t" - "stfd 9,128(11)\n\t" - "stfd 10,136(11)\n\t" - "stfd 11,144(11)\n\t" - "stfd 12,152(11)\n\t" - "stfd 13,160(11)\n\t" - "li 3,176\n\t" - "stvx 2,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 3,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 4,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 5,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 6,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 7,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 8,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 9,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 10,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 11,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 12,3,11\n\t" - "addi 3,3,16\n\t" - "stvx 13,3,11\n\t" - "ld 3,0(11)\n\t" + "addis 12,2,gparms@got@ha\n\t" + "ld 12,gparms@got@l(12)\n\t" + "std 3,0(12)\n\t" + "std 4,8(12)\n\t" + "std 5,16(12)\n\t" + "std 6,24(12)\n\t" + "std 7,32(12)\n\t" + "std 8,40(12)\n\t" + "std 9,48(12)\n\t" + "std 10,56(12)\n\t" + "stfd 1,64(12)\n\t" + "stfd 2,72(12)\n\t" + "stfd 3,80(12)\n\t" + "stfd 4,88(12)\n\t" + "stfd 5,96(12)\n\t" + "stfd 6,104(12)\n\t" + "stfd 7,112(12)\n\t" + "stfd 8,120(12)\n\t" + "stfd 9,128(12)\n\t" + "stfd 10,136(12)\n\t" + "stfd 11,144(12)\n\t" + "stfd 12,152(12)\n\t" + "stfd 13,160(12)\n\t" + "li 0,176\n\t" + "stvx 2,12,0\n\t" + "li 0,192\n\t" + "stvx 3,12,0\n\t" + "li 0,208\n\t" + "stvx 4,12,0\n\t" + "li 0,224\n\t" + "stvx 5,12,0\n\t" + "li 0,240\n\t" + "stvx 6,12,0\n\t" + "li 0,256\n\t" + "stvx 7,12,0\n\t" + "li 0,272\n\t" + "stvx 8,12,0\n\t" + "li 0,288\n\t" + "stvx 9,12,0\n\t" + "li 0,304\n\t" + "stvx 10,12,0\n\t" + "li 0,320\n\t" + "stvx 11,12,0\n\t" + "li 0,336\n\t" + "stvx 12,12,0\n\t" + "li 0,352\n\t" + "stvx 13,12,0\n\t" "bctr"); } @@ -198,7 +195,7 @@ fcivv (char *s, int i, vector int v, vector int w) abort (); a = vec_add (v,w); - + if (!vec_all_eq (a, c)) abort (); } @@ -226,7 +223,7 @@ fcevv (char *s, ...) v = va_arg(arg, vector int); w = va_arg(arg, vector int); a = vec_add (v,w); - + if (!vec_all_eq (a, c)) abort (); @@ -233,7 +230,7 @@ fcevv (char *s, ...) /* Go back one frame. */ sp = __builtin_frame_address(0); sp = sp->backchain; - + if (sp->slot[2].l != MAKE_SLOT (1, 2) || sp->slot[4].l != MAKE_SLOT (5, 6)) abort(); @@ -265,17 +262,17 @@ fciievv (char *s, int i, int j, ...) if ((long) j != lparms.gprs[2]) abort(); - + v = va_arg(arg, vector int); w = va_arg(arg, vector int); a = vec_add (v,w); - + if (!vec_all_eq (a, c)) abort (); sp = __builtin_frame_address(0); sp = sp->backchain; - + if (sp->slot[4].l != MAKE_SLOT (1, 2) || sp->slot[6].l != MAKE_SLOT (5, 6)) abort(); @@ -291,19 +288,19 @@ fcvevv (char *s, vector int x, ...) va_list arg; va_start (arg, x); - + v = va_arg(arg, vector int); w = va_arg(arg, vector int); a = vec_add (v,w); a = vec_add (a, x); - + if (!vec_all_eq (a, c)) abort (); sp = __builtin_frame_address(0); sp = sp->backchain; - + if (sp->slot[4].l != MAKE_SLOT (1, 2) || sp->slot[6].l != MAKE_SLOT (5, 6)) abort(); @@ -310,12 +307,12 @@ fcvevv (char *s, vector int x, ...) } int __attribute__((no_instrument_function, noinline)) -main1() -{ +main1() +{ char *s = "vv"; vector int v = {1, 2, 3, 4}; vector int w = {5, 6, 7, 8}; - + fcvi (s, v, 2); fcvv (s, v, w); fcivv (s, 1, v, w); @@ -325,7 +322,7 @@ int __attribute__((no_instrument_function, noinlin return 0; } -int __attribute__((no_instrument_function)) +int __attribute__((no_instrument_function)) main() { /* Exit on systems without altivec. */ @@ -370,12 +367,12 @@ fnp_cvvvv (char *s, vector int v, vector int w, abort (); a = vec_add (v,w); - a = vec_add (a,x); - a = vec_add (a,y); - + a = vec_add (a,x); + a = vec_add (a,y); + if (!vec_all_eq (a, c)) abort (); - + v0.v = lparms.vrs[0]; v1.v = lparms.vrs[1]; v2.v = lparms.vrs[2]; @@ -401,11 +398,10 @@ fnp_cvvvv (char *s, vector int v, vector int w, sp = __builtin_frame_address(0); sp = sp->backchain; - + if (sp->slot[8].l != v3.l[0]) abort (); if (sp->slot[9].l != v3.l[1]) abort (); -} - +}