From patchwork Tue Mar 3 21:57:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: DJ Delorie X-Patchwork-Id: 445922 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E3B5314018C for ; Wed, 4 Mar 2015 08:57:53 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=JPM8Rqj8; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject; q=dns; s=default; b=LmdTgRDBRFeyYbX vOmAu2Hf2ZqK5FyRwCgJpoFTjgWYhL3pGpsgObPDTkoJRM0NMNpwtewJYc/5+xrz gVBmtInkUOwzFS4trOH88M6XBabWo9wqX0xBLY4kQiS/iqPakjg7EDNAG/EHLzPG a7oQP936zJer95XmsoVM50fQq6Nk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject; s=default; bh=Cau6HyBvMuyzsEfW9FS9U ZzeA/U=; b=JPM8Rqj87I0pgx+SUMJJ48qrw8BcO53TnGOde7vXJBg9JBFZm28oK +mFgqX7SmpK6rsrDa30EsZEWBxbqxJUO9thWbwGyeCkCRk4ymb+f9cVlCQfUOMuY 5TYHP9nmjY2S00OtEyFs8jd7v/Ht05X7WbkRIEiMsTiwhMQAHXAQP0= Received: (qmail 75853 invoked by alias); 3 Mar 2015 21:57:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 75837 invoked by uid 89); 3 Mar 2015 21:57:46 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_40, SPF_HELO_PASS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 03 Mar 2015 21:57:45 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t23LvhaS031538 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Tue, 3 Mar 2015 16:57:43 -0500 Received: from greed.delorie.com (ovpn-113-65.phx2.redhat.com [10.3.113.65]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t23LvgMJ015511 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO) for ; Tue, 3 Mar 2015 16:57:43 -0500 Received: from greed.delorie.com (greed.delorie.com [127.0.0.1]) by greed.delorie.com (8.14.4/8.14.4) with ESMTP id t23LvfNW005051 for ; Tue, 3 Mar 2015 16:57:41 -0500 Received: (from dj@localhost) by greed.delorie.com (8.14.4/8.14.4/Submit) id t23Lvfes005049; Tue, 3 Mar 2015 16:57:41 -0500 Date: Tue, 3 Mar 2015 16:57:41 -0500 Message-Id: <201503032157.t23Lvfes005049@greed.delorie.com> From: DJ Delorie To: gcc-patches@gcc.gnu.org Subject: [rl78] more far addr edge cases X-IsSubscribed: yes More edge cases regarding far addresses. Committed. * config/rl78/rl78-real.md (*addqi_real): Allow SADDR types for inc/dec. (*addhi3_real): Likewise. * config/rl78/rl78-virt.md (*inc3_virt): Additional pattern to match incrementing memory. * config/rl78/predicates.md (rl78_1_2_operand): New. * config/rl78/rl78.c (rl78_force_nonfar_3): Allow far mem-mem if it's the same and only mem. (rl78_alloc_physical_registers_op2): If there's effectively only one MEM, transcode it into HL. (rl78_far_p): Reject addresses that aren't legitimate. Index: config/rl78/predicates.md =================================================================== --- config/rl78/predicates.md (revision 221163) +++ config/rl78/predicates.md (working copy) @@ -58,6 +58,21 @@ (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op), 0, 255)"))) +(define_predicate "rl78_incdec_memory_operand" + (and (match_code "mem") + (match_test "rl78_far_p (op) +|| satisfies_constraint_Wsa (op) +|| satisfies_constraint_Whl (op) +|| satisfies_constraint_Wh1 (op) +|| satisfies_constraint_Wab (op)") + ) +) + +(define_predicate "rl78_1_2_operand" + (and (match_code "const_int") + (match_test "IN_RANGE (INTVAL (op), 1, 2) + || IN_RANGE (INTVAL (op), -2, -1)"))) + (define_predicate "rl78_24_operand" (and (match_code "const_int") (match_test "INTVAL (op) == 2 || INTVAL (op) == 4"))) Index: config/rl78/rl78-real.md =================================================================== --- config/rl78/rl78-real.md (revision 221163) +++ config/rl78/rl78-real.md (working copy) @@ -113,14 +113,14 @@ ;;---------- Arithmetic ------------------------ (define_insn "*addqi3_real" - [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1,rvWabWhlWh1,a,*bcdehl,Wsa") + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1Wsa,rvWabWhlWh1Wsa,a,*bcdehl,Wsa") (plus:QI (match_operand:QI 1 "rl78_general_operand" "%0,0,0,0,0") (match_operand:QI 2 "rl78_general_operand" "K,L,RWhlWh1Wabi,a,i"))) ] "rl78_real_insns_ok ()" "@ - inc\t%0 - dec\t%0 + inc\t%p0 + dec\t%p0 add\t%0, %2 add\t%0, %2 add\t%0, %2" @@ -128,7 +128,7 @@ ) (define_insn "*addhi3_real" - [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=vABDTWh1Wab,vABDTWh1Wab,v,v,A,S,S,A") + [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=vABDTWhlWh1WabWsa,vABDTWhlWh1WabWsa,v,v,A,S,S,A") (plus:HI (match_operand:HI 1 "rl78_general_operand" "%0,0,0,0,0,0,0,S") (match_operand:HI 2 "" "K,L,N,O,RWh1WhlWabiv,Int8Qs8,J,Ri"))) ] Index: config/rl78/rl78-virt.md =================================================================== --- config/rl78/rl78-virt.md (revision 221163) +++ config/rl78/rl78-virt.md (working copy) @@ -85,6 +85,15 @@ ;;---------- Arithmetic ------------------------ +(define_insn "*inc3_virt" + [(set (match_operand:QHI 0 "rl78_incdec_memory_operand" "=vm") + (plus:QHI (match_operand:QHI 1 "rl78_incdec_memory_operand" "0") + (match_operand:QHI 2 "rl78_1_2_operand" "KLNO"))) + ] + "rl78_virt_insns_ok ()" + "v.inc\t%0, %1, %2" +) + (define_insn "*add3_virt" [(set (match_operand:QHI 0 "rl78_nonfar_nonimm_operand" "=vY,S") (plus:QHI (match_operand:QHI 1 "rl78_nonfar_operand" "viY,0") Index: config/rl78/rl78.c =================================================================== --- config/rl78/rl78.c (revision 221163) +++ config/rl78/rl78.c (working copy) @@ -579,6 +579,13 @@ int did = 0; rtx temp_reg = NULL; + /* As an exception, we allow two far operands if they're identical + and the third operand is not a MEM. This allows global variables + to be incremented, for example. */ + if (rtx_equal_p (operands[0], operands[1]) + && ! MEM_P (operands[2])) + return 0; + /* FIXME: Likewise. */ if (rl78_far_p (operands[1])) { @@ -970,6 +977,12 @@ fprintf (stderr, "\033[35mrl78_far_p: "); debug_rtx (x); fprintf (stderr, " = %d\033[0m\n", MEM_ADDR_SPACE (x) == ADDR_SPACE_FAR); #endif + + /* Not all far addresses are legitimate, because the devirtualizer + can't handle them. */ + if (! rl78_as_legitimate_address (GET_MODE (x), XEXP (x, 0), false, ADDR_SPACE_FAR)) + return 0; + return GET_MODE_BITSIZE (rl78_addr_space_address_mode (MEM_ADDR_SPACE (x))) == 32; } @@ -3007,9 +3020,18 @@ if (rtx_equal_p (OP (0), OP (1))) { - OP (0) = - OP (1) = transcode_memory_rtx (OP (1), DE, insn); - OP (2) = transcode_memory_rtx (OP (2), HL, insn); + if (MEM_P (OP (2))) + { + OP (0) = + OP (1) = transcode_memory_rtx (OP (1), DE, insn); + OP (2) = transcode_memory_rtx (OP (2), HL, insn); + } + else + { + OP (0) = + OP (1) = transcode_memory_rtx (OP (1), HL, insn); + OP (2) = transcode_memory_rtx (OP (2), DE, insn); + } } else if (rtx_equal_p (OP (0), OP (2))) {