From patchwork Mon Jan 26 19:06:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 432982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0BE40140145 for ; Tue, 27 Jan 2015 06:07:05 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=LZ/ujJdBB8tEYqt3P upMnlx1llowYlDWs/0W+4jxmzZka1Y14PzgR/jMZsmbJ4Svr0YpETqCRieZOmuLG yNFqKPWkbSPXUZDjC+IMKDog/fUohrHwoxVlS+EVOFpafKfkscyHZufC0dbMmxRo xyVBT3+SpcKXy2DMYeg2Gh6tIg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=d6ho75u4uUf5hEKxpzzXa+K g+cA=; b=tu1J3XRfVNk+XNigbkp10TKHpS3MFHJRUg4kMW6sBf1bvZbluFjJrbU XO23CzETxxgcHQOt/duCXr7ZJocVP9QLR2GPDrIXs4znLfd09mSzBhv6el0w6Hun okJfUPk1iCQqdbfyGgDMVw/BZADmRcSu9JFiAMILx3+bBuDPi4zM= Received: (qmail 10296 invoked by alias); 26 Jan 2015 19:06:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 10287 invoked by uid 89); 26 Jan 2015 19:06:55 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.2 required=5.0 tests=AWL, SPF_HELO_PASS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Mon, 26 Jan 2015 19:06:54 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id t0QJ6gAB000633; Mon, 26 Jan 2015 13:06:42 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id t0QJ6fr9000632; Mon, 26 Jan 2015 13:06:41 -0600 Date: Mon, 26 Jan 2015 13:06:41 -0600 From: Segher Boessenkool To: Hale Wang Cc: GCC Patches Subject: Re: [PATCH] [gcc, combine] PR46164: Don't combine the insns if a volatile register is contained. Message-ID: <20150126190641.GA32345@gate.crashing.org> References: <001e01d0394e$470bc390$d5234ab0$@arm.com> Mime-Version: 1.0 Content-Disposition: inline In-Reply-To: <001e01d0394e$470bc390$d5234ab0$@arm.com> User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes On Mon, Jan 26, 2015 at 05:55:52PM +0800, Hale Wang wrote: > diff --git a/gcc/combine.c b/gcc/combine.c > index 5c763b4..cf48666 100644 > --- a/gcc/combine.c > +++ b/gcc/combine.c > @@ -2004,6 +2004,13 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn > *pred ATTRIBUTE_UNUSED, > return 0; > } > > + /* If src contains a volatile register, reject, because the register may > + possibly be used in a asm operand. The combined insn may cause the > asm > + operand to be generated unexpectly. */ > + > + if (REG_P (src) && REG_USERVAR_P (src)) > + return 0; > + > /* If INSN contains anything volatile, or is an `asm' (whether volatile > or not), reject, unless nothing volatile comes between it and I3 */ > diff --git a/gcc/testsuite/gcc.target/arm/pr46164.c > b/gcc/testsuite/gcc.target/arm/pr46164.c > new file mode 100644 > index 0000000..ad3b7cb > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/pr46164.c > @@ -0,0 +1,26 @@ > +/* { dg-do compile } */ > +/* { dg-options "-mcpu=cortex-m3 -mthumb -O1" } */ Just "-O1" reproduces the problem here, FWIW. Could you try this patch please? Segher diff --git a/gcc/combine.c b/gcc/combine.c index 58de157..10c3b0e 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1928,6 +1928,10 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED, set = expand_field_assignment (set); src = SET_SRC (set), dest = SET_DEST (set); + /* Don't eliminate a register variable. */ + if (REG_P (dest) && REG_USERVAR_P (dest)) + return 0; + /* Don't eliminate a store in the stack pointer. */ if (dest == stack_pointer_rtx /* Don't combine with an insn that sets a register to itself if it has