From patchwork Tue Dec 9 09:17:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 418985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8D2E0140082 for ; Tue, 9 Dec 2014 20:17:38 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=nxlbZEGQVLHkH+axc QPREQ6Ay5mOWrDsQoZt8JOeeQCppPTmxsQ1/gyFRbNNlgh2avkHYHACMGpyeoYTn oo4NDjDwDnMAYQMRvGaF/omNFLXpL6+aZM1HVvnZdX5B7sZuBdbf6RC5tcuS4C8I codH//Ru/sCioAxQFQNzr4amr0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:references:mime-version :content-type:in-reply-to; s=default; bh=eSHUGJGskIOQH1G1KNgebry Q7Oo=; b=OmTnydQVWQkEFPdqkqU/hqqkkqoArFd9pmb6zeeNNr2cBZxg15ucJX8 OzChzn/uHxzX891oWd/qPfwMOe8OE5QObUeOlWwJlz93OA93MaQUcSqXSyoV8XVs btwa8dT9vGqZubS8j5wsSzORVv90cojGAYyWr0Q+9FkDDFED73ZA= Received: (qmail 9522 invoked by alias); 9 Dec 2014 09:17:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 9501 invoked by uid 89); 9 Dec 2014 09:17:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, SPF_HELO_PASS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 09 Dec 2014 09:17:29 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id sB99HR6O017569 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 Dec 2014 04:17:27 -0500 Received: from tucnak.zalov.cz (ovpn-116-64.ams2.redhat.com [10.36.116.64]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id sB99HPF5011027 (version=TLSv1/SSLv3 cipher=AES128-GCM-SHA256 bits=128 verify=NO); Tue, 9 Dec 2014 04:17:27 -0500 Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.14.9/8.14.9) with ESMTP id sB99HNHL028409; Tue, 9 Dec 2014 10:17:24 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.14.9/8.14.9/Submit) id sB99HNNb028408; Tue, 9 Dec 2014 10:17:23 +0100 Date: Tue, 9 Dec 2014 10:17:23 +0100 From: Jakub Jelinek To: Uros Bizjak Cc: Kirill Yukhin , "gcc-patches@gcc.gnu.org" Subject: Re: [PATCH] Fix broadcast from scalar patterns (PR target/63594) Message-ID: <20141209091723.GO1667@tucnak.redhat.com> Reply-To: Jakub Jelinek References: <20141208214210.GL1667@tucnak.redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes On Tue, Dec 09, 2014 at 09:49:17AM +0100, Uros Bizjak wrote: > > (define_insn "_vec_dup_gpr" > > - [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v") > > - (vec_duplicate:VI48_AVX512VL > > - (match_operand: 1 "register_operand" "r")))] > > - "TARGET_AVX512F && (mode != DImode || TARGET_64BIT)" > > -{ > > - return "vpbroadcast\t{%1, %0|%0, %1}"; > > -} > > - [(set_attr "type" "ssemov") > > - (set_attr "prefix" "evex") > > - (set_attr "mode" "")]) > > - > > -(define_insn "_vec_dup_mem" > > - [(set (match_operand:V48_AVX512VL 0 "register_operand" "=v") > > - (vec_duplicate:V48_AVX512VL > > - (match_operand: 1 "nonimmediate_operand" "vm")))] > > + [(set (match_operand:V48_AVX512VL 0 "register_operand" "=v,v") > > + (vec_duplicate:V48_AVX512VL > > + (match_operand: 1 "nonimmediate_operand" "vm,r")))] > > "TARGET_AVX512F" > > "vbroadcast\t{%1, %0|%0, %1}" > > [(set_attr "type" "ssemov") > > (set_attr "prefix" "evex") > > - (set_attr "mode" "")]) > > + (set_attr "mode" "") > > + (set (attr "enabled") > > + (if_then_else (eq_attr "alternative" "1") > > + (symbol_ref "GET_MODE_CLASS (mode) == MODE_INT > > + && (mode != DImode || TARGET_64BIT)") > > + (const_int 1)))]) I have no idea how to get rid of this enabled attribute, as it disables just one alternative. Creating a special isa attribute for it looks less readable and much more expensive. This enabled attribute is IMHO of the good kind, GET_MODE_CLASS (mode) == MODE_INT and mode != DImode are constants for the particular chosen mode, TARGET_64BIT doesn't change during compilation of a TU, and so the only variable is that it disables just one of the alternatives. > > @@ -16759,7 +16744,10 @@ (define_split > > [(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand") > > (vec_duplicate:AVX2_VEC_DUP_MODE > > (match_operand: 1 "register_operand")))] > > - "TARGET_AVX2 && reload_completed && GENERAL_REG_P (operands[1])" > > + "TARGET_AVX2 > > + && (!TARGET_AVX512VL > > + || (!TARGET_AVX512BW && GET_MODE_SIZE (mode) > 2)) > > + && reload_completed && GENERAL_REG_P (operands[1])" > > [(const_int 0)] > > We would like to avoid convoluted insn enable condition by moving the > target delated complexity to the mode iterator, even if it requires > additional single-use mode iterator. In the ideal case, the remaining > target-dependant condition would represent the baseline target for an > insn and all other target-related conditions would be inside mode > iterator. This splitter condition can be replaced with mode iterator, but it results in big repetitions there (incremental diff below). Or do you have something else in mind? Jakub --- gcc/config/i386/sse.md 2014-12-08 13:26:06.505543457 +0100 +++ gcc/config/i386/sse.md 2014-12-08 13:26:06.505543457 +0100 @@ -16740,14 +16740,21 @@ (set_attr "isa" "avx2,noavx2,avx2,noavx2") (set_attr "mode" ",V8SF,,V8SF")]) +;; Modes handled by AVX2 vec_dup splitter. Assumes TARGET_AVX2, +;; if both -mavx512vl and -mavx512bw are used, disables all modes, +;; if just -mavx512vl, disables just V*SI. +(define_mode_iterator AVX2_VEC_DUP_MODE_SPLIT + [(V32QI "!TARGET_AVX512VL || !TARGET_AVX512BW") + (V16QI "!TARGET_AVX512VL || !TARGET_AVX512BW") + (V16HI "!TARGET_AVX512VL || !TARGET_AVX512BW") + (V8HI "!TARGET_AVX512VL || !TARGET_AVX512BW") + (V8SI "!TARGET_AVX512VL") (V4SI "!TARGET_AVX512VL")]) + (define_split - [(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand") - (vec_duplicate:AVX2_VEC_DUP_MODE + [(set (match_operand:AVX2_VEC_DUP_MODE_SPLIT 0 "register_operand") + (vec_duplicate:AVX2_VEC_DUP_MODE_SPLIT (match_operand: 1 "register_operand")))] - "TARGET_AVX2 - && (!TARGET_AVX512VL - || (!TARGET_AVX512BW && GET_MODE_SIZE (mode) > 2)) - && reload_completed && GENERAL_REG_P (operands[1])" + "TARGET_AVX2 && reload_completed && GENERAL_REG_P (operands[1])" [(const_int 0)] { emit_insn (gen_vec_setv4si_0 (gen_lowpart (V4SImode, operands[0]),