From patchwork Fri Oct 17 14:25:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Yukhin X-Patchwork-Id: 400536 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2ADCE1400B2 for ; Sat, 18 Oct 2014 01:25:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=SEr4JQK8HByf9h+t4 orv2MBnNwVOnAZVoqcHSIPz2wd45D+QCWbsh9v7Pgsur1g4kTZDmN1uPJe6FCw+1 j06G658uiJgOjKU+UHuPL0CYe6xnqAMTT5MblrbzvD9PvJzAlzUcXS5m9658I06m 1S7ChMof9m1m0PdSQVZNBInSY0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=H6Rc4aSlVCzLJfNcWzPsLd1 RED8=; b=ImJe4gojsqtzMdAHmLhR/NNF7Y+mZnuq0tVAr9IdSusci/SofHZFRrt eBccdr+IByD5JXqanYkCmmiv2PwuMgbr0AMs91CKaOXGcEb8Z4euYQttFItRZFJn +nhvcbrwjcIki2OuAUJJtsuQjQ5Hl14G8FXP/s7DXjesTBvOuLuc= Received: (qmail 19316 invoked by alias); 17 Oct 2014 14:25:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19305 invoked by uid 89); 17 Oct 2014 14:25:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f50.google.com Received: from mail-wg0-f50.google.com (HELO mail-wg0-f50.google.com) (74.125.82.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 17 Oct 2014 14:25:21 +0000 Received: by mail-wg0-f50.google.com with SMTP id a1so1019816wgh.33 for ; Fri, 17 Oct 2014 07:25:18 -0700 (PDT) X-Received: by 10.180.79.38 with SMTP id g6mr14108363wix.42.1413555918459; Fri, 17 Oct 2014 07:25:18 -0700 (PDT) Received: from msticlxl57.ims.intel.com (fmdmzpr04-ext.fm.intel.com. [192.55.55.39]) by mx.google.com with ESMTPSA id hc8sm2153340wib.1.2014.10.17.07.25.15 for (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Oct 2014 07:25:18 -0700 (PDT) Date: Fri, 17 Oct 2014 18:25:07 +0400 From: Kirill Yukhin To: Uros Bizjak Cc: Jakub Jelinek , Richard Henderson , GCC Patches Subject: Re: [PATCH i386 AVX512 Boostrap] [80/n] Extend expand_sse2_mulvxdi3. Message-ID: <20141017142505.GC49545@msticlxl57.ims.intel.com> References: <20141016115551.GA51430@msticlxl57.ims.intel.com> <20141017123231.GB49545@msticlxl57.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Hello, This is fix for bootstrap failure. Is it OK? gcc/ * config/i386/i386.c (ix86_expand_sse2_mulvxdi3): Refactor conditions to fix bootstrap. --- Thanks, K diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7040200..3ddaf3d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -45671,21 +45671,12 @@ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2) enum machine_mode mode = GET_MODE (op0); rtx t1, t2, t3, t4, t5, t6; - if (TARGET_AVX512DQ) - { - rtx (*gen) (rtx, rtx, rtx); - - if (mode == V8DImode) - gen = gen_avx512dq_mulv8di3; - else if (TARGET_AVX512VL) - { - if (mode == V4DImode) - gen = gen_avx512dq_mulv4di3; - else if (mode == V2DImode) - gen = gen_avx512dq_mulv2di3; - } - emit_insn (gen (op0, op1, op2)); - } + if (TARGET_AVX512DQ && mode == V8DImode) + emit_insn (gen_avx512dq_mulv8di3 (op0, op1, op2)); + else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V4DImode) + emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2)); + else if (TARGET_AVX512DQ && TARGET_AVX512VL && mode == V2DImode) + emit_insn (gen_avx512dq_mulv2di3 (op0, op1, op2)); else if (TARGET_XOP && mode == V2DImode) { /* op1: A,B,C,D, op2: E,F,G,H */