From patchwork Fri Oct 17 12:32:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kirill Yukhin X-Patchwork-Id: 400519 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A8FA91400A6 for ; Fri, 17 Oct 2014 23:32:55 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:content-transfer-encoding:in-reply-to; q=dns; s= default; b=pHxJBRGwSTPJS8IqZ0BxOX9aXS/yB5jU6yUn7Su48vIoosBDpqmaM Jmi+JspB0YWwz1ARID/Y3no0apad4QR/cai7g0YKx8Kd2Lk8MB1SYoKW73TOEYre f5cMc7VSLdo30ozFhy5rAkGuIVd0mtKigzbEOjDeZX+Sslo6S/uzk0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:content-transfer-encoding:in-reply-to; s=default; bh=uRUM2BCh1cq1wQ0HvzfxtSf2ifw=; b=Va2KFOeQ7+yreV6D32tDESa7V/SA yaIqFVDFXj0IaG6Y8eFGZjf3py8bZoTs4DcmiJ8900Z8UMze9AcmeGi4yn0e67po 8/6nSGzUw2RafihXOY81mkahysjurYQNp6v/2wbH6ppHIJaZuuS/0R+rkmfma/RB SqsOSbIL0gv6chI= Received: (qmail 16547 invoked by alias); 17 Oct 2014 12:32:48 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16535 invoked by uid 89); 17 Oct 2014 12:32:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f48.google.com Received: from mail-wg0-f48.google.com (HELO mail-wg0-f48.google.com) (74.125.82.48) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 17 Oct 2014 12:32:46 +0000 Received: by mail-wg0-f48.google.com with SMTP id k14so815971wgh.7 for ; Fri, 17 Oct 2014 05:32:43 -0700 (PDT) X-Received: by 10.194.246.230 with SMTP id xz6mr9077873wjc.3.1413549163836; Fri, 17 Oct 2014 05:32:43 -0700 (PDT) Received: from msticlxl57.ims.intel.com (fmdmzpr04-ext.fm.intel.com. [192.55.55.39]) by mx.google.com with ESMTPSA id l9sm1881028wia.0.2014.10.17.05.32.40 for (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Oct 2014 05:32:43 -0700 (PDT) Date: Fri, 17 Oct 2014 16:32:33 +0400 From: Kirill Yukhin To: Uros Bizjak Cc: Jakub Jelinek , Richard Henderson , GCC Patches Subject: Re: [PATCH i386 AVX512] [80/n] Extend expand_sse2_mulvxdi3. Message-ID: <20141017123231.GB49545@msticlxl57.ims.intel.com> References: <20141016115551.GA51430@msticlxl57.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Hello Uroš, On 16 Oct 14:29, Uros Bizjak wrote: > > + if (mode == V4DImode) > > + emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2)); > > + else if (mode == V2DImode) > > + emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2)); > > Should this be v2di ? Right, copy-and-paste :( > > > + } > > + } > > + else if (TARGET_XOP && mode == V2DImode) > > { > > /* op1: A,B,C,D, op2: E,F,G,H */ > > op1 = gen_lowpart (V4SImode, op1); > > Please use function pointers in the added part. Done. Updated patch in the bottom. Is it ok? --- Thanks, K diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c3202c4..415e330 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -45667,7 +45667,22 @@ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2) enum machine_mode mode = GET_MODE (op0); rtx t1, t2, t3, t4, t5, t6; - if (TARGET_XOP && mode == V2DImode) + if (TARGET_AVX512DQ) + { + rtx (*gen) (rtx, rtx, rtx); + + if (mode == V8DImode) + gen = gen_avx512dq_mulv8di3; + else if (TARGET_AVX512VL) + { + if (mode == V4DImode) + gen = gen_avx512dq_mulv4di3; + else if (mode == V2DImode) + gen = gen_avx512dq_mulv2di3; + } + emit_insn (gen (op0, op1, op2)); + } + else if (TARGET_XOP && mode == V2DImode) { /* op1: A,B,C,D, op2: E,F,G,H */ op1 = gen_lowpart (V4SImode, op1);