From patchwork Mon Sep 15 15:28:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Tocar X-Patchwork-Id: 389417 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6CF7A14013A for ; Tue, 16 Sep 2014 01:29:10 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=JW8EUDlElfNUdDVpLfucsa5qD7M3UvElipbZcTYlgGTNKcKYJE xlT6TKSB0DugDUZQNRU53ytFvjPulDTeIwI3KP0raU9q7LEDVD++W6s2kUTxj7FC CJa9BqnXSpd7VNbLBKdd2AIu8WlnethwgvX6H3hl2FGOKhVxI6Ws9pq7w= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=OQwgVtKF201gUboXiz6+qR/8cm4=; b=Lqf7X9YyqFHLODjK0+iH /F9zUX+kVO95xjS3apMb6n/7PRg4l3gGe5jPua9RcsUhcJyedIn0tONgQinDieTR m05xEBOa6kE6mR/13Qi2wNKWGlTa/lq3d/MJQ9mmlceeDUV5avr/OKKT6Zz4Q4KF wrsV0MK5TjyTwlTUiVL9JD4= Received: (qmail 3343 invoked by alias); 15 Sep 2014 15:29:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 3328 invoked by uid 89); 15 Sep 2014 15:29:02 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f47.google.com Received: from mail-pa0-f47.google.com (HELO mail-pa0-f47.google.com) (209.85.220.47) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 15 Sep 2014 15:29:01 +0000 Received: by mail-pa0-f47.google.com with SMTP id ey11so6530369pad.34 for ; Mon, 15 Sep 2014 08:28:58 -0700 (PDT) X-Received: by 10.66.174.17 with SMTP id bo17mr38954063pac.98.1410794936967; Mon, 15 Sep 2014 08:28:56 -0700 (PDT) Received: from msticlxl7.ims.intel.com (jfdmzpr05-ext.jf.intel.com. [134.134.139.74]) by mx.google.com with ESMTPSA id fa16sm12168092pac.43.2014.09.15.08.28.54 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 Sep 2014 08:28:56 -0700 (PDT) Date: Mon, 15 Sep 2014 19:28:32 +0400 From: Ilya Tocar To: Uros Bizjak Cc: GCC Patches Subject: [PATCH,i386] Properly check xgetbv for zmm support. Message-ID: <20140915152832.GC1778@msticlxl7.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes Hi, Currently we don't check zmm/mask-registers related bits in xgetbv output, when detecting native cpu. Patch below fixes it. Bootstraps/passes make check. Ok for trunk? ChangeLog: gcc/ 2014-09-15 Ilya Tocar * config/i386/driver-i386.c (host_detect_local_cpu): Detect lack of zmm/k regs support. testsuite/ 2014-09-15 Ilya Tocar * gcc.target/i386/avx512f-os-support.h: Remove magic number. --- gcc/config/i386/driver-i386.c | 17 +++++++++++++++++ gcc/testsuite/gcc.target/i386/avx512f-os-support.h | 17 +++++++++++++++-- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index af3088e..4d6bf83 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -533,6 +533,9 @@ const char *host_detect_local_cpu (int argc, const char **argv) #define XSTATE_FP 0x1 #define XSTATE_SSE 0x2 #define XSTATE_YMM 0x4 +#define XSTATE_OPMASK 0x20 +#define XSTATE_ZMM 0x40 +#define XSTATE_HI_ZMM 0x80 if (has_osxsave) asm (".byte 0x0f; .byte 0x01; .byte 0xd0" : "=a" (eax), "=d" (edx) @@ -554,6 +557,20 @@ const char *host_detect_local_cpu (int argc, const char **argv) has_xsavec = 0; } + if (!has_osxsave + || (eax & + (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM)) + != (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM)) + { + has_avx512f = 0; + has_avx512er = 0; + has_avx512pf = 0; + has_avx512cd = 0; + has_avx512dq = 0; + has_avx512bw = 0; + has_avx512vl = 0; + } + if (!arch) { if (vendor == signature_AMD_ebx diff --git a/gcc/testsuite/gcc.target/i386/avx512f-os-support.h b/gcc/testsuite/gcc.target/i386/avx512f-os-support.h index deefa5e..2f1ed03 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-os-support.h +++ b/gcc/testsuite/gcc.target/i386/avx512f-os-support.h @@ -1,10 +1,23 @@ /* Check if the OS supports executing AVX512F instructions. */ +#define XCR_XFEATURE_ENABLED_MASK 0x0 + +#define XSTATE_FP 0x1 +#define XSTATE_SSE 0x2 +#define XSTATE_YMM 0x4 +#define XSTATE_OPMASK 0x20 +#define XSTATE_ZMM 0x40 +#define XSTATE_HI_ZMM 0x80 + static int avx512f_os_support (void) { unsigned int eax, edx; + unsigned int ecx = XCR_XFEATURE_ENABLED_MASK; + unsigned int mask = XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK + | XSTATE_ZMM | XSTATE_HI_ZMM; + + __asm__ ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (ecx)); - __asm__ ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0)); - return (eax & 230) == 230; + return ((eax & mask) == mask); }