From patchwork Fri Aug 22 10:15:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Yukhin X-Patchwork-Id: 382137 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 442331400E0 for ; Fri, 22 Aug 2014 20:15:34 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=fblWJ9a+O4x0ZYuuLE6KOGmuJmEgIkI+u8/WATizAyuHPXfUBA DFZLvEPSKO/NATpfHTlNdQXxukpdN9QHsShivpDj5L/ye45Jj0xer1JCleZISOwI p9BpcJV1KdoiwsZXeyEbuqGEAJ8d0dABPzJ4zDZaq75A8Tso93V5orW+U= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=D0fNwddssuMIVkdQlc5imWt1/34=; b=XihkebeYfTIhRYn0Ia5K mBcsZpu929TNP3J5t5cLB3eWIFe7K+KUoNN0ipvUfKOgcta3lI0dGb8zu99QTYhk oXznZNe3/81hJyzuRmfod+KaEAEZYs1X0X1jXEjTqDyCJOemtLw6tqBF5OEZUaNE taGeWOSWUKap8IQ5tE2E3+k= Received: (qmail 19700 invoked by alias); 22 Aug 2014 10:15:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19610 invoked by uid 89); 22 Aug 2014 10:15:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f175.google.com Received: from mail-wi0-f175.google.com (HELO mail-wi0-f175.google.com) (209.85.212.175) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 22 Aug 2014 10:15:17 +0000 Received: by mail-wi0-f175.google.com with SMTP id ho1so9940259wib.14 for ; Fri, 22 Aug 2014 03:15:14 -0700 (PDT) X-Received: by 10.194.119.41 with SMTP id kr9mr1540266wjb.114.1408702514552; Fri, 22 Aug 2014 03:15:14 -0700 (PDT) Received: from msticlxl57.ims.intel.com (jfdmzpr02-ext.jf.intel.com. [134.134.137.71]) by mx.google.com with ESMTPSA id fy1sm8615028wic.6.2014.08.22.03.15.11 for (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Aug 2014 03:15:14 -0700 (PDT) Date: Fri, 22 Aug 2014 14:15:01 +0400 From: Kirill Yukhin To: Uros Bizjak Cc: Jakub Jelinek , Richard Henderson , GCC Patches , kirill.yukhin@gmail.com Subject: [PATCH i386 AVX512] [21/n] Extend variable shift patterns. Message-ID: <20140822101453.GA47539@msticlxl57.ims.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Hello, This patch extends shift patterns with per-element shift value. It was adopted by approach suggested in previous patches. Bootstrapped. New tests on top of patch-set all pass under simulator. Is it ok for trunk? gcc/ * config/i386/sse.md (define_mode_iterator VI48_AVX2_48_AVX512F): Delete. (define_mode_iterator VI48_AVX512BW): New. (define_insn "_v"): Delete. (define_insn "_v" with VI48_AVX2_48_AVX512F): New. (define_insn "_v" with VI2_AVX512VL): Ditto. --- Thanks, K diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5084892..cd0c08e 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -359,9 +359,9 @@ (V8SI "TARGET_AVX2") V4SI (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI]) -(define_mode_iterator VI48_AVX2_48_AVX512F - [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI - (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI]) +(define_mode_iterator VI48_AVX512F + [(V16SI "TARGET_AVX512F") V8SI V4SI + (V8DI "TARGET_AVX512F") V4DI V2DI]) (define_mode_iterator V48_AVX2 [V4SF V2DF @@ -15320,17 +15320,28 @@ (set_attr "prefix" "maybe_evex") (set_attr "mode" "")]) -(define_insn "_v" - [(set (match_operand:VI48_AVX2_48_AVX512F 0 "register_operand" "=v") - (any_lshift:VI48_AVX2_48_AVX512F - (match_operand:VI48_AVX2_48_AVX512F 1 "register_operand" "v") - (match_operand:VI48_AVX2_48_AVX512F 2 "nonimmediate_operand" "vm")))] +(define_insn "_v" + [(set (match_operand:VI48_AVX512F 0 "register_operand" "=v") + (any_lshift:VI48_AVX512F + (match_operand:VI48_AVX512F 1 "register_operand" "v") + (match_operand:VI48_AVX512F 2 "nonimmediate_operand" "vm")))] "TARGET_AVX2 && " "vpv\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") (set_attr "prefix" "maybe_evex") (set_attr "mode" "")]) +(define_insn "_v" + [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v") + (any_lshift:VI2_AVX512VL + (match_operand:VI2_AVX512VL 1 "register_operand" "v") + (match_operand:VI2_AVX512VL 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX512BW" + "vpv\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "sseishft") + (set_attr "prefix" "maybe_evex") + (set_attr "mode" "")]) + ;; For avx_vec_concat insn pattern (define_mode_attr concat_tg_mode [(V32QI "t") (V16HI "t") (V8SI "t") (V4DI "t") (V8SF "t") (V4DF "t")