diff mbox

[i386,AVX512,12/n] Extend OI/TImode moves.

Message ID 20140814114211.GF49937@msticlxl57.ims.intel.com
State New
Headers show

Commit Message

Kirill Yukhin Aug. 14, 2014, 11:42 a.m. UTC 
Hello,
This patch extends moves to OI/TI mode.

Bootstrapped.
New tests on top of patch-set all pass
under simulator.

Is it ok for trunk?

gcc/
	* config/i386/i386.md
	(define_insn "*movoi_internal_avx"): Add EVEX version.
	(define_insn "*movti_internal"): Ditto.

--
Thanks, K

Comments

Uros Bizjak Aug. 14, 2014, 1:53 p.m. UTC | #1 
On Thu, Aug 14, 2014 at 1:42 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> This patch extends moves to OI/TI mode.
>
> Bootstrapped.
> New tests on top of patch-set all pass
> under simulator.
>
> Is it ok for trunk?
>
> gcc/
>         * config/i386/i386.md
>         (define_insn "*movoi_internal_avx"): Add EVEX version.
>         (define_insn "*movti_internal"): Ditto.

OK.

Thanks,
Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 3a797c8..39fb2307 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1920,8 +1920,8 @@ 
    (set_attr "mode" "XI")])
 
 (define_insn "*movoi_internal_avx"
-  [(set (match_operand:OI 0 "nonimmediate_operand" "=x,x ,m")
-	(match_operand:OI 1 "vector_move_operand"  "C ,xm,x"))]
+  [(set (match_operand:OI 0 "nonimmediate_operand" "=v,v ,m")
+	(match_operand:OI 1 "vector_move_operand"  "C ,vm,v"))]
   "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -1935,6 +1935,8 @@ 
 	{
 	  if (get_attr_mode (insn) == MODE_V8SF)
 	    return "vmovups\t{%1, %0|%0, %1}";
+	  else if (get_attr_mode (insn) == MODE_XI)
+	    return "vmovdqu32\t{%1, %0|%0, %1}";
 	  else
 	    return "vmovdqu\t{%1, %0|%0, %1}";
 	}
@@ -1942,6 +1944,8 @@ 
 	{
 	  if (get_attr_mode (insn) == MODE_V8SF)
 	    return "vmovaps\t{%1, %0|%0, %1}";
+	  else if (get_attr_mode (insn) == MODE_XI)
+	    return "vmovdqa32\t{%1, %0|%0, %1}";
 	  else
 	    return "vmovdqa\t{%1, %0|%0, %1}";
 	}
@@ -1953,7 +1957,10 @@ 
   [(set_attr "type" "sselog1,ssemov,ssemov")
    (set_attr "prefix" "vex")
    (set (attr "mode")
-	(cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
+	(cond [(ior (match_operand 0 "ext_sse_reg_operand")
+		    (match_operand 1 "ext_sse_reg_operand"))
+		 (const_string "XI")
+	       (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
 		 (const_string "V8SF")
 	       (and (eq_attr "alternative" "2")
 		    (match_test "TARGET_SSE_TYPELESS_STORES"))
@@ -1962,8 +1969,8 @@ 
 	      (const_string "OI")))])
 
 (define_insn "*movti_internal"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,x,x ,m")
-	(match_operand:TI 1 "general_operand"      "riFo,re,C,xm,x"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,v,v ,m")
+	(match_operand:TI 1 "general_operand"      "riFo,re,C,vm,v"))]
   "(TARGET_64BIT || TARGET_SSE)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
@@ -1983,6 +1990,8 @@ 
 	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovups\t{%1, %0|%0, %1}";
+	  else if (get_attr_mode (insn) == MODE_XI)
+	    return "vmovdqu32\t{%1, %0|%0, %1}";
 	  else
 	    return "%vmovdqu\t{%1, %0|%0, %1}";
 	}
@@ -1990,6 +1999,8 @@ 
 	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovaps\t{%1, %0|%0, %1}";
+	  else if (get_attr_mode (insn) == MODE_XI)
+	    return "vmovdqa32\t{%1, %0|%0, %1}";
 	  else
 	    return "%vmovdqa\t{%1, %0|%0, %1}";
 	}
@@ -2005,7 +2016,10 @@ 
        (const_string "maybe_vex")
        (const_string "orig")))
    (set (attr "mode")
-   	(cond [(eq_attr "alternative" "0,1")
+	(cond [(ior (match_operand 0 "ext_sse_reg_operand")
+		    (match_operand 1 "ext_sse_reg_operand"))
+		 (const_string "XI")
+	       (eq_attr "alternative" "0,1")
 		 (const_string "DI")
 	       (ior (not (match_test "TARGET_SSE2"))
 		    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))