[Committed] S/390: Fix htm target check

diff --git a/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c b/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c
index df7e2ba..6022efb 100644
--- a/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c
+++ b/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c
@@ -1,12 +1,50 @@ 
-/* { dg-do compile } */
-/* { dg-options "-O3 -march=zEC12 -mzarch" } */
+/* { dg-do run } */
+/* { dg-require-effective-target htm } */
+/* { dg-options "-O3 -march=zEC12 -mzarch --save-temps" } */
 
-int
-foo ()
+/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin
+   instruction does not automatically preserves them.  If the
+   transaction body is fully contained in a function the backend tries
+   after reload to get rid of the FPR save/restore operations
+   triggered by the clobbers.  This testcase failed since the backend
+   was able to get rid of all FPR saves/restores and since these were
+   the only stack operations also of the entire stack space.  So even
+   the save/restore of the stack pointer was omitted in the end.
+   However, since the frame layout has been fixed before, the prologue
+   still generated the stack pointer decrement making foo return with
+   a modified stack pointer.  */
+
+void abort(void);
+
+void __attribute__((noinline))
+foo (int a)
+{
+  if (__builtin_tbegin (0) == 0)
+    __builtin_tend ();
+}
+
+#ifdef __s390x__
+#define GET_STACK_POINTER(SP)			\
+  asm volatile ("stg %%r15, %0" : "=QRST" (SP));
+#else
+#define GET_STACK_POINTER(SP)			\
+  asm volatile ("st %%r15, %0" : "=QR" (SP));
+#endif
+
+int main(void)
 {
-  __builtin_tbegin_nofloat (0);
-  __builtin_tbegin_retry_nofloat (0, 42);
+  unsigned long new_sp, old_sp;
+
+  GET_STACK_POINTER (old_sp);
+  foo(42);
+  GET_STACK_POINTER (new_sp);
+
+  if (old_sp != new_sp)
+    abort ();
+
+  return 0;
 }
+
 /* Make sure no FPR saves/restores are emitted.  */
-/* { dg-final { scan-assembler-not "std" } } */
-/* { dg-final { scan-assembler-not "ld" } } */
+/* { dg-final { scan-assembler-not "\tstd\t" } } */
+/* { dg-final { scan-assembler-not "\tld\t" } } */
diff --git a/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c b/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c
deleted file mode 100644
index 59621a4..0000000
--- a/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c
+++ /dev/null
@@ -1,55 +0,0 @@ 
-/* { dg-do run } */
-/* { dg-options "-O3 -mhtm -Wa,-march=zEC12,-mzarch --save-temps" } */
-
-/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin
-   instruction does not automatically preserves them.  If the
-   transaction body is fully contained in a function the backend tries
-   after reload to get rid of the FPR save/restore operations
-   triggered by the clobbers.  This testcase failed since the backend
-   was able to get rid of all FPR saves/restores and since these were
-   the only stack operations also of the entire stack space.  So even
-   the save/restore of the stack pointer was omitted in the end.
-   However, since the frame layout has been fixed before, the prologue
-   still generated the stack pointer decrement making foo return with
-   a modified stack pointer.  */
-
-void abort(void);
-
-void __attribute__((noinline))
-foo (int a)
-{
-  /* This is just to prevent the tbegin code from actually being
-     executed.  That way the test may even run on machines prior to
-     zEC12.  */
-  if (a == 42)
-    return;
-
-  if (__builtin_tbegin (0) == 0)
-    __builtin_tend ();
-}
-
-#ifdef __s390x__
-#define GET_STACK_POINTER(SP)			\
-  asm volatile ("stg %%r15, %0" : "=QRST" (SP));
-#else
-#define GET_STACK_POINTER(SP)			\
-  asm volatile ("st %%r15, %0" : "=QR" (SP));
-#endif
-
-int main(void)
-{
-  unsigned long new_sp, old_sp;
-
-  GET_STACK_POINTER (old_sp);
-  foo(42);
-  GET_STACK_POINTER (new_sp);
-
-  if (old_sp != new_sp)
-    abort ();
-
-  return 0;
-}
-
-/* Make sure no FPR saves/restores are emitted.  */
-/* { dg-final { scan-assembler-not "\tstd\t" } } */
-/* { dg-final { scan-assembler-not "\tld\t" } } */
diff --git a/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c b/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c
new file mode 100644
index 0000000..df7e2ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=zEC12 -mzarch" } */
+
+int
+foo ()
+{
+  __builtin_tbegin_nofloat (0);
+  __builtin_tbegin_retry_nofloat (0, 42);
+}
+/* Make sure no FPR saves/restores are emitted.  */
+/* { dg-final { scan-assembler-not "std" } } */
+/* { dg-final { scan-assembler-not "ld" } } */
diff --git a/gcc/testsuite/gcc.target/s390/s390.exp b/gcc/testsuite/gcc.target/s390/s390.exp
index 1b6d94a..f2ba929 100644
--- a/gcc/testsuite/gcc.target/s390/s390.exp
+++ b/gcc/testsuite/gcc.target/s390/s390.exp
@@ -24,17 +24,17 @@  if ![istarget s390*-*-*] then {
 # Load support procs.
 load_lib gcc-dg.exp
 
-# Return 1 if htm (etnd - extract nesting depth) instructions can be
-# compiled.
+# Return 1 if htm (etnd - extract nesting depth) instructions are
+# understood by the assembler and can be executed.
 proc check_effective_target_htm { } {
     if { ![check_runtime s390_check_htm [subst {
 	int main (void)
 	{
-	    unsigned int nd = 77;
-	    asm (".insn rre,0xb2ec0000,%0,0" : "=d" (nd));
+	    unsigned int nd;
+	    asm ("etnd %0" : "=d" (nd));
 	    return nd;
 	}
-    }]] } { return 0 } else { return 1 }
+    }] "-march=zEC12 -mzarch" ] } { return 0 } else { return 1 }
 }
 
 # If a testcase doesn't have special options, use these.