From patchwork Thu Nov 28 23:02:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 295027 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 835312C00A2 for ; Fri, 29 Nov 2013 10:03:14 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; q=dns; s=default; b=js9WtMNKZkdEdonu2fYgd0T5SPLBm 8qT0AnmJwabZQR1cegitJw1WfktRVKNMDivB0vBWNrbiXHrWmJSl6K9y4Ok28Uep qZ8wsXcMybVU9j5IiDVa5HNSmKKOv2WVm56eWnCrL5/yFv9G3xP6ctO+dP26TNeq wbWv+R+bd33eN0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; s=default; bh=t1EZEwpaxshOlgOooTkQO9QVrjo=; b=BPy w8BRkiWv7ACK0EcPiFvIUx9sMRSNNS4Zf+qKk/M/2JwJIgpnw32CGeDQu/Os0io/ qcQD4MN5K4yn3evl/1s+6NTH6jaR8+YHDtElX60v+RvErrMBpMAfA+U3uhSdiNAS IRkpLvGsHjhNZGkICpDrtzmdgs32qHtGwefSG7y4= Received: (qmail 14841 invoked by alias); 28 Nov 2013 23:03:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14768 invoked by uid 89); 28 Nov 2013 23:03:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_50, RDNS_NONE, SPF_HELO_PASS, SPF_PASS autolearn=no version=3.3.2 X-HELO: mx1.redhat.com Received: from Unknown (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 28 Nov 2013 23:03:00 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id rASN2qjc022941 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 28 Nov 2013 18:02:53 -0500 Received: from tucnak.zalov.cz (vpn1-4-30.ams2.redhat.com [10.36.4.30]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id rASN2ptm029830 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 28 Nov 2013 18:02:52 -0500 Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.14.7/8.14.7) with ESMTP id rASN2ols005095; Fri, 29 Nov 2013 00:02:50 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.14.7/8.14.7/Submit) id rASN2ofJ005094; Fri, 29 Nov 2013 00:02:50 +0100 Date: Fri, 29 Nov 2013 00:02:50 +0100 From: Jakub Jelinek To: gcc-patches@gcc.gnu.org Cc: Richard Henderson Subject: [PATCH] Avoid SIMD clone dg-do run tests if assembler doesn't support AVX2 (PR lto/59326) Message-ID: <20131128230250.GT892@tucnak.redhat.com> Reply-To: Jakub Jelinek MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Hi! As we create SIMD clones for all of SSE2, AVX and AVX2 ISAs right now, the assembler needs to support SSE2, AVX and AVX2. Apparently some folks are still using binutils that don't handle that, this patch conditionalizes the test on that. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2013-11-28 Jakub Jelinek PR lto/59326 * gcc.target/i386/i386.exp (check_effective_target_avx2): Move to... * lib/target-supports.exp (check_effective_target_avx2): ... here. (check_effective_target_vect_simd_clones): New. * gcc.dg/vect/vect-simd-clone-1.c: Add dg-require-effective-target vect_simd_clones. * gcc.dg/vect/vect-simd-clone-2.c: Likewise. * gcc.dg/vect/vect-simd-clone-3.c: Likewise. * gcc.dg/vect/vect-simd-clone-4.c: Likewise. * gcc.dg/vect/vect-simd-clone-5.c: Likewise. * gcc.dg/vect/vect-simd-clone-6.c: Likewise. * gcc.dg/vect/vect-simd-clone-7.c: Likewise. * gcc.dg/vect/vect-simd-clone-8.c: Likewise. * gcc.dg/vect/vect-simd-clone-9.c: Likewise. * gcc.dg/vect/vect-simd-clone-10.c: Likewise. * gcc.dg/vect/vect-simd-clone-11.c: Likewise. Jakub --- gcc/testsuite/gcc.target/i386/i386.exp.jj 2013-01-11 09:02:38.000000000 +0100 +++ gcc/testsuite/gcc.target/i386/i386.exp 2013-11-28 13:36:40.464167773 +0100 @@ -209,18 +209,6 @@ proc check_effective_target_lzcnt { } { } "-mlzcnt" ] } -# Return 1 if avx2 instructions can be compiled. -proc check_effective_target_avx2 { } { - return [check_no_compiler_messages avx2 object { - typedef long long __v4di __attribute__ ((__vector_size__ (32))); - __v4di - mm256_is32_andnotsi256 (__v4di __X, __v4di __Y) - { - return __builtin_ia32_andnotsi256 (__X, __Y); - } - } "-O0 -mavx2" ] -} - # Return 1 if bmi instructions can be compiled. proc check_effective_target_bmi { } { return [check_no_compiler_messages bmi object { --- gcc/testsuite/lib/target-supports.exp.jj 2013-11-15 09:39:37.000000000 +0100 +++ gcc/testsuite/lib/target-supports.exp 2013-11-28 13:35:54.408422777 +0100 @@ -2146,6 +2146,32 @@ proc check_effective_target_vect_floatui return $et_vect_floatuint_cvt_saved } +# Return 1 if the target supports #pragma omp declare simd, 0 otherwise. +# +# This won't change for different subtargets so cache the result. + +proc check_effective_target_vect_simd_clones { } { + global et_vect_simd_clones_saved + + if [info exists et_vect_simd_clones_saved] { + verbose "check_effective_target_vect_simd_clones: using cached result" 2 + } else { + set et_vect_simd_clones_saved 0 + if { [istarget i?86-*-*] || [istarget x86_64-*-*] } { + # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and + # avx2 clone. Only the right clone for the specified arch will be + # chosen, but still we need to at least be able to assemble + # avx2. + if { [check_effective_target_avx2] } { + set et_vect_simd_clones_saved 1 + } + } + } + + verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2 + return $et_vect_simd_clones_saved +} + # Return 1 if this is a AArch64 target supporting big endian proc check_effective_target_aarch64_big_endian { } { return [check_no_compiler_messages aarch64_big_endian assembly { @@ -5106,6 +5132,18 @@ proc check_effective_target_avx { } { } "-O2 -mavx" ] } +# Return 1 if avx2 instructions can be compiled. +proc check_effective_target_avx2 { } { + return [check_no_compiler_messages avx2 object { + typedef long long __v4di __attribute__ ((__vector_size__ (32))); + __v4di + mm256_is32_andnotsi256 (__v4di __X, __v4di __Y) + { + return __builtin_ia32_andnotsi256 (__X, __Y); + } + } "-O0 -mavx2" ] +} + # Return 1 if sse instructions can be compiled. proc check_effective_target_sse { } { return [check_no_compiler_messages sse object { --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c 2013-11-28 13:24:55.345839723 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c 2013-11-28 13:25:43.158572535 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c 2013-11-28 13:25:46.065577204 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c 2013-11-28 13:25:48.995559597 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c 2013-11-28 13:25:51.973546669 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c 2013-11-28 13:25:56.014520288 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c 2013-11-28 13:25:59.357501867 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c 2013-11-28 13:26:02.247490531 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c 2013-11-28 13:26:05.176474430 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c 2013-11-28 13:25:07.801776994 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ /* { dg-additional-sources vect-simd-clone-10a.c } */ --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c.jj 2013-11-27 12:15:14.000000000 +0100 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c 2013-11-28 13:25:18.300726999 +0100 @@ -1,3 +1,4 @@ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */