From patchwork Sat Sep 28 12:40:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joern Rennecke X-Patchwork-Id: 278739 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1F6A22C00BA for ; Sat, 28 Sep 2013 22:40:25 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:to:subject:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=whiJJem2py6ZuKbD TtiFedGji9sV8Md+UpEzsmgef6ubNn4KSsrOgTiiNjVxX3pfuCzvqvsjsUNl3MhB xXygJSuFcxSqFrKKRhc28e5EVwIC6XxUgeeZw9DhOZG3QFGIHkdMrofqQHb+CuV9 GmtDnrfWQ/bb9wj/9Ugj1sG5R5o= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:to:subject:mime-version:content-type :content-transfer-encoding; s=default; bh=ccrK0l4V6dEKWylTEVyneS Rn+II=; b=EFeJOJ8KlJxeR3jz5KJn0hKlnhiot/FghUelhY8Qe8ZX2/6LNfh3jr t6f9gzOE+1JlLrreCfmUCQvG3KG7c2zv1b7PGCRICuzLAmvef3GhxVAue5a6jL9a sbX3bRwuUrsjGN+VqtXIgC7003zrH1vVNXhlS1eNc5Ib8icPaFvyM= Received: (qmail 31886 invoked by alias); 28 Sep 2013 12:40:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 31870 invoked by uid 89); 28 Sep 2013 12:40:16 -0000 Received: from c62.cesmail.net (HELO c62.cesmail.net) (216.154.195.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Sat, 28 Sep 2013 12:40:16 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL, BAYES_00, FSL_HELO_NON_FQDN_1, RDNS_NONE autolearn=no version=3.3.2 X-HELO: c62.cesmail.net Received: from unknown (HELO delta2) ([192.168.1.50]) by c62.cesmail.net with ESMTP; 28 Sep 2013 08:40:13 -0400 Received: from cust213-dsl91-135-11.idnet.net (cust213-dsl91-135-11.idnet.net [91.135.11.213]) by webmail.spamcop.net (Horde MIME library) with HTTP; Sat, 28 Sep 2013 08:40:13 -0400 Message-ID: <20130928084013.2ikmgo08ow0wg44k-nzlynne@webmail.spamcop.net> Date: Sat, 28 Sep 2013 08:40:13 -0400 From: Joern Rennecke To: gcc-patches@gcc.gnu.org Subject: RFA [testsuite]: New ARC target specific tests MIME-Version: 1.0 User-Agent: Internet Messaging Program (IMP) H3 (4.1.4) This patch adds a number of tests for ARC target specific options. I'm a bit uncertain here if I still need approval for this patch. On the one hand the changes are all in an area that is normally within the remit of a target maintainer, and patch to add the gcc.target/arc directory has already been accepted. OTOH, the man body of the ARC port is still stuck waiting for review, so I'm still in the weird position of a target maintainer without an accepted target port. 2013-09-28 Simon Cook Joern Rennecke * gcc.target/arc/barrel-shifter-1.c: New test. * gcc.target/arc/barrel-shifter-2.c: Likewise. * gcc.target/arc/long-calls.c, gcc.target/arc/mA6.c: Likewise. * gcc.target/arc/mA7.c, gcc.target/arc/mARC600.c: Likewise. * gcc.target/arc/mARC601.c, gcc.target/arc/mARC700.c: Likewise. * gcc.target/arc/mcpu-arc600.c, gcc.target/arc/mcpu-arc601.c: Likewise. * gcc.target/arc/mcpu-arc700.c, gcc.target/arc/mcrc.c: Likewise. * gcc.target/arc/mdpfp.c, gcc.target/arc/mdsp-packa.c: Likewise. * gcc.target/arc/mdvbf.c, gcc.target/arc/mlock.c: Likewise. * gcc.target/arc/mmac-24.c, gcc.target/arc/mmac-d16.c: Likewise. * gcc.target/arc/mno-crc.c, gcc.target/arc/mno-dsp-packa.c: Likewise. * gcc.target/arc/mno-dvbf.c, gcc.target/arc/mno-lock.c: Likewise. * gcc.target/arc/mno-mac-24.c, gcc.target/arc/mno-mac-d16.c: Likewise. * gcc.target/arc/mno-rtsc.c, gcc.target/arc/mno-swape.c: Likewise. * gcc.target/arc/mno-xy.c, gcc.target/arc/mrtsc.c: Likewise. * gcc.target/arc/mspfp.c, gcc.target/arc/mswape.c: Likewise. * gcc.target/arc/mtune-ARC600.c: Likewise. * gcc.target/arc/mtune-ARC601.c: Likewise. * gcc.target/arc/mtune-ARC700-xmac: Likewise. * gcc.target/arc/mtune-ARC700.c: Likewise. * gcc.target/arc/mtune-ARC725D.c: Likewise. * gcc.target/arc/mtune-ARC750D.c: Likewise. * gcc.target/arc/mul64.c, gcc.target/arc/mxy.c: Likewise. * gcc.target/arc/no-dpfp-lrsr.c: Likewise. diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c new file mode 100644 index 0000000..a0eb6d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mcpu=ARC601 -mbarrel-shifter" } */ +int i; + +int f (void) +{ + i >>= 2; +} + +/* { dg-final { scan-assembler "asr_s" } } */ diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c new file mode 100644 index 0000000..97998fb --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +int i; + +int f (void) +{ + i >>= 2; +} + +/* { dg-final { scan-assembler "asr_s" } } */ diff --git a/gcc/testsuite/gcc.target/arc/long-calls.c b/gcc/testsuite/gcc.target/arc/long-calls.c new file mode 100644 index 0000000..63fafbc --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/long-calls.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mlong-calls" } */ + +int g (void); + +int f (void) +{ + g(); +} + +/* { dg-final { scan-assembler "j @g" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mA6.c b/gcc/testsuite/gcc.target/arc/mA6.c new file mode 100644 index 0000000..2e15a86 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mA6.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mA6" } */ + +/* { dg-final { scan-assembler ".cpu ARC600" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mA7.c b/gcc/testsuite/gcc.target/arc/mA7.c new file mode 100644 index 0000000..c4430f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mA7.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mA7" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mARC600.c b/gcc/testsuite/gcc.target/arc/mARC600.c new file mode 100644 index 0000000..20e086a --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mARC600.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mARC600" } */ + +/* { dg-final { scan-assembler ".cpu ARC600" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mARC601.c b/gcc/testsuite/gcc.target/arc/mARC601.c new file mode 100644 index 0000000..1d30da4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mARC601.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mARC601" } */ + +/* { dg-final { scan-assembler ".cpu ARC601" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mARC700.c b/gcc/testsuite/gcc.target/arc/mARC700.c new file mode 100644 index 0000000..43e9baa --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mARC700.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mARC700" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc600.c b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c new file mode 100644 index 0000000..4c915fd --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=ARC600" } */ + +/* { dg-final { scan-assembler ".cpu ARC600" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc601.c b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c new file mode 100644 index 0000000..7c93c9d --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=ARC601" } */ + +/* { dg-final { scan-assembler ".cpu ARC601" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc700.c b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c new file mode 100644 index 0000000..c805a5a --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=ARC700" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mcrc.c b/gcc/testsuite/gcc.target/arc/mcrc.c new file mode 100644 index 0000000..d3780bb --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mcrc.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mcrc" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mdpfp.c b/gcc/testsuite/gcc.target/arc/mdpfp.c new file mode 100644 index 0000000..4bbc905 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mdpfp.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mdpfp" } */ + +double i; + +int f (void) +{ + i *= 2.0; +} + +/* { dg-final { scan-assembler "daddh" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mdsp-packa.c b/gcc/testsuite/gcc.target/arc/mdsp-packa.c new file mode 100644 index 0000000..f013a6d --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mdsp-packa.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mdsp-packa" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mdvbf.c b/gcc/testsuite/gcc.target/arc/mdvbf.c new file mode 100644 index 0000000..e2e545e --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mdvbf.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mdvbf" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mlock.c b/gcc/testsuite/gcc.target/arc/mlock.c new file mode 100644 index 0000000..3a8b050 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mlock.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mlock" } */ +/* { dg-do assemble } */ + +int f (void *p) +{ + int i; + + __asm__("llock %0, [%1]\n\t" + "scond %0, [%1]" : "=&r"(i) : "r"(p)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mmac-24.c b/gcc/testsuite/gcc.target/arc/mmac-24.c new file mode 100644 index 0000000..30cb698 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mmac-24.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mmac-24" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mmac-d16.c b/gcc/testsuite/gcc.target/arc/mmac-d16.c new file mode 100644 index 0000000..0570011 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mmac-d16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mmac-d16" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-crc.c b/gcc/testsuite/gcc.target/arc/mno-crc.c new file mode 100644 index 0000000..70ab9c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-crc.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-crc" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c new file mode 100644 index 0000000..eb21522 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-dsp-packa" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-dvbf.c b/gcc/testsuite/gcc.target/arc/mno-dvbf.c new file mode 100644 index 0000000..ea96d98 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-dvbf.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-dvbf" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-lock.c b/gcc/testsuite/gcc.target/arc/mno-lock.c new file mode 100644 index 0000000..62ac885 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-lock.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-lock" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (void *p) +{ + int i; + + __asm__("llock %0, [%1]\n\t" + "scond %0, [%1]" : "=&r"(i) : "r"(p)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-24.c b/gcc/testsuite/gcc.target/arc/mno-mac-24.c new file mode 100644 index 0000000..b483957 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-mac-24.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-mac-24" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-d16.c b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c new file mode 100644 index 0000000..68a20f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-mac-d16" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-rtsc.c b/gcc/testsuite/gcc.target/arc/mno-rtsc.c new file mode 100644 index 0000000..d74a60e --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-rtsc.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-rtsc" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("rtsc %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-swape.c b/gcc/testsuite/gcc.target/arc/mno-swape.c new file mode 100644 index 0000000..c853ab4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-swape.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-swape" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +int f (int i) +{ + __asm__("swape %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mno-xy.c b/gcc/testsuite/gcc.target/arc/mno-xy.c new file mode 100644 index 0000000..e378b3f --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mno-xy.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-xy" } */ +/* Would also like to assemble and check that we get the expected + "Error: bad instruction" assembler messages, but at the moment our + testharness can't do that. */ + +void f (int i) +{ + __asm__("add x0_u0, x0_u0, %0" : : "r" (i)); +} diff --git a/gcc/testsuite/gcc.target/arc/mrtsc.c b/gcc/testsuite/gcc.target/arc/mrtsc.c new file mode 100644 index 0000000..31852a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mrtsc.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mrtsc" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("rtsc %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mspfp.c b/gcc/testsuite/gcc.target/arc/mspfp.c new file mode 100644 index 0000000..0e41ff8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mspfp.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mspfp" } */ + +float i; + +int f (void) +{ + i *= 2.0; +} + +/* { dg-final { scan-assembler "fadd" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mswape.c b/gcc/testsuite/gcc.target/arc/mswape.c new file mode 100644 index 0000000..692e6a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mswape.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mswape" } */ +/* { dg-do assemble } */ + +int f (int i) +{ + __asm__("swape %1, %1" : "=r"(i) : "r"(i)); + return i; +} diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC600.c b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c new file mode 100644 index 0000000..a483d14 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC600" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC601.c b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c new file mode 100644 index 0000000..ed57bd7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC601" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac new file mode 100644 index 0000000..2f1e137 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC700-xmac" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700.c b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c new file mode 100644 index 0000000..851ea73 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC700" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c new file mode 100644 index 0000000..e2aa484 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC725D" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c new file mode 100644 index 0000000..2092330 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=ARC750D" } */ + +/* { dg-final { scan-assembler ".cpu ARC700" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mul64.c b/gcc/testsuite/gcc.target/arc/mul64.c new file mode 100644 index 0000000..3678b27 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mul64.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mcpu=ARC600 -mmul64" } */ +#include + +int64_t i; +int j, k; + +int f (void) +{ + i = j * k; +} + +/* { dg-final { scan-assembler "mul64" } } */ diff --git a/gcc/testsuite/gcc.target/arc/mxy.c b/gcc/testsuite/gcc.target/arc/mxy.c new file mode 100644 index 0000000..1ecc34d --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/mxy.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-mxy" } */ +/* { dg-do assemble } */ + +void f (int i) +{ + __asm__("add x0_u0, x0_u0, %0" : : "r" (i)); +} diff --git a/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c new file mode 100644 index 0000000..e4e23e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mdpfp -mno-dpfp-lrsr" } */ + +double i; + +int f (void) +{ + i *= 2.0; +} + +/* { dg-final { scan-assembler-not "\tlr" } } */