diff mbox

, GCC 4.9 powerpc, merge movdi insns

Message ID 20130131000640.GA17740@ibm-tiger.the-meissners.org
State New
Headers show

Commit Message

Michael Meissner Jan. 31, 2013, 12:06 a.m. UTC 
This is the last of the merge insn patches.  It merges the power6x movdi with
the normal floating point movdi.

2013-01-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with
	movdi_internal64, using wg constraint for move direct operations.

Like the other patches, I have bootstrapped with it, and had no regression
changes.  Once 4.9 opens up, is this acceptable to be checked in?

Comments

David Edelsohn Feb. 5, 2013, 6:48 p.m. UTC | #1 
On Wed, Jan 30, 2013 at 7:06 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> This is the last of the merge insn patches.  It merges the power6x movdi with
> the normal floating point movdi.
>
> 2013-01-30  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         * config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with
>         movdi_internal64, using wg constraint for move direct operations.
>
> Like the other patches, I have bootstrapped with it, and had no regression
> changes.  Once 4.9 opens up, is this acceptable to be checked in?

This patch is okay after 4.9 tree opens.

Thanks, David
diff mbox

Patch

Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 195592)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -8542,10 +8542,10 @@  (define_split
   [(pc)]
 { rs6000_split_multireg_move (operands[0], operands[1]); DONE; })
 
-(define_insn "*movdi_mfpgpr"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,r,?*d")
-	(match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,*d,r"))]
-  "TARGET_POWERPC64 && TARGET_MFPGPR && TARGET_HARD_FLOAT && TARGET_FPRS
+(define_insn "*movdi_internal64"
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,?Z,?wa,?wa,r,*h,*h,?wa,r,?*wg")
+	(match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,wa,Z,wa,*h,r,0,O,*wg,r"))]
+  "TARGET_POWERPC64
    && (gpc_reg_operand (operands[0], DImode)
        || gpc_reg_operand (operands[1], DImode))"
   "@
@@ -8558,36 +8558,17 @@  (define_insn "*movdi_mfpgpr"
    stfd%U0%X0 %1,%0
    lfd%U1%X1 %0,%1
    fmr %0,%1
+   stxsd%U0x %x1,%y0
+   lxsd%U1x %x0,%y1
+   xxlor %x0,%x1,%x1
    mf%1 %0
    mt%0 %1
    nop
+   xxlxor %x0,%x0,%x0
    mftgpr %0,%1
    mffgpr %0,%1"
-  [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,mftgpr,mffgpr")
-   (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4")])
-
-(define_insn "*movdi_internal64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,?m,?*d,?*d,r,*h,*h,?wa")
-	(match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,d,m,d,*h,r,0,O"))]
-  "TARGET_POWERPC64 && (!TARGET_MFPGPR || !TARGET_HARD_FLOAT || !TARGET_FPRS)
-   && (gpc_reg_operand (operands[0], DImode)
-       || gpc_reg_operand (operands[1], DImode))"
-  "@
-   std%U0%X0 %1,%0
-   ld%U1%X1 %0,%1
-   mr %0,%1
-   li %0,%1
-   lis %0,%v1
-   #
-   stfd%U0%X0 %1,%0
-   lfd%U1%X1 %0,%1
-   fmr %0,%1
-   mf%1 %0
-   mt%0 %1
-   nop
-   xxlxor %x0,%x0,%x0"
-  [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,mfjmpr,mtjmpr,*,vecsimple")
-   (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4")])
+  [(set_attr "type" "store,load,*,*,*,*,fpstore,fpload,fp,fpstore,fpload,vecsimple,mfjmpr,mtjmpr,*,vecsimple,mftgpr,mffgpr")
+   (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4,4,4,4,4")])
 
 ;; immediate value valid for a single instruction hiding in a const_double
 (define_insn ""