@@ -1874,7 +1874,7 @@
(const_string "OI")))])
(define_insn "*movti_internal_rex64"
- [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,!o ,x,x ,m")
+ [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,x,x ,m")
(match_operand:TI 1 "general_operand" "riFo,riF,C,xm,x"))]
"TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
@@ -2100,6 +2100,8 @@ adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
if (adjust_address)
{
+ rtx x;
+
/* If MEMREF is a LO_SUM and the offset is within the alignment of the
object, we can merge it into the LO_SUM. */
if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
@@ -2109,6 +2111,20 @@ adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
plus_constant (address_mode,
XEXP (addr, 1), offset));
+ /* We permute zero/sign-extension and addition operation only if
+ converting the constant does not change it. */
+ else if ((GET_CODE (addr) == ZERO_EXTEND
+ || GET_CODE (addr) == SIGN_EXTEND)
+ && (x = GEN_INT (offset),
+ x == convert_memory_address_addr_space (address_mode,
+ x,
+ attrs.addrspace)))
+ {
+ enum rtx_code code = GET_CODE (addr);
+ addr = XEXP (addr, 0);
+ addr = plus_constant (GET_MODE (addr), addr, offset);
+ addr = gen_rtx_fmt_e (code, address_mode, addr);
+ }
else
addr = plus_constant (address_mode, addr, offset);
}
@@ -1934,15 +1934,22 @@ int
offsettable_address_addr_space_p (int strictp, enum machine_mode mode, rtx y,
addr_space_t as)
{
- enum rtx_code ycode = GET_CODE (y);
+ enum rtx_code ycode;
rtx z;
- rtx y1 = y;
+ rtx y1;
rtx *y2;
int (*addressp) (enum machine_mode, rtx, addr_space_t) =
(strictp ? strict_memory_address_addr_space_p
: memory_address_addr_space_p);
unsigned int mode_sz = GET_MODE_SIZE (mode);
+ /* Allow zero-extended or sign-extended address. */
+ if (GET_CODE (y) == ZERO_EXTEND || GET_CODE (y) == SIGN_EXTEND)
+ y = XEXP (y, 0);
+
+ ycode = GET_CODE (y);
+ y1 = y;
+
if (CONSTANT_ADDRESS_P (y))
return 1;
new file mode 100644
@@ -0,0 +1,37 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-require-effective-target maybe_x32 } */
+/* { dg-options "-O2 -mx32 -mtune=generic -maddress-mode=long" } */
+
+typedef unsigned int uint32_t;
+typedef uint32_t Elf32_Word;
+typedef uint32_t Elf32_Addr;
+typedef struct {
+ Elf32_Word st_name;
+ Elf32_Addr st_value;
+ Elf32_Word st_size;
+ unsigned char st_other;
+} Elf32_Sym;
+typedef struct {
+ Elf32_Word r_info;
+}
+Elf32_Rela;
+typedef struct {
+ union {
+ Elf32_Addr d_ptr;
+ }
+ d_un;
+} Elf32_Dyn;
+struct link_map {
+ Elf32_Dyn *l_info[34];
+};
+extern void symbind32 (Elf32_Sym *);
+void
+_dl_profile_fixup (struct link_map *l, Elf32_Word reloc_arg)
+{
+ const Elf32_Sym *const symtab = (const void *) l->l_info[6]->d_un.d_ptr;
+ const Elf32_Rela *const reloc = (const void *) (l->l_info[23]->d_un.d_ptr + reloc_arg * sizeof (Elf32_Rela));
+ Elf32_Sym sym = symtab[(reloc->r_info) >> 8];
+ symbind32 (&sym);
+}
+
+/* { dg-final { scan-assembler-not "%xmm\[0-9\]" } } */