From patchwork Wed Sep 7 18:12:29 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 113809 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id EA60DB6F81 for ; Thu, 8 Sep 2011 04:13:00 +1000 (EST) Received: (qmail 15837 invoked by alias); 7 Sep 2011 18:12:52 -0000 Received: (qmail 15819 invoked by uid 22791); 7 Sep 2011 18:12:49 -0000 X-SWARE-Spam-Status: No, hits=-6.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, SPF_HELO_PASS, TW_AV X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 07 Sep 2011 18:12:31 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p87ICVDf003101 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 7 Sep 2011 14:12:31 -0400 Received: from tyan-ft48-01.lab.bos.redhat.com (tyan-ft48-01.lab.bos.redhat.com [10.16.42.4]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p87ICUwT008615 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 7 Sep 2011 14:12:30 -0400 Received: from tyan-ft48-01.lab.bos.redhat.com (localhost.localdomain [127.0.0.1]) by tyan-ft48-01.lab.bos.redhat.com (8.14.4/8.14.4) with ESMTP id p87ICTM0030941; Wed, 7 Sep 2011 20:12:29 +0200 Received: (from jakub@localhost) by tyan-ft48-01.lab.bos.redhat.com (8.14.4/8.14.4/Submit) id p87ICTLZ030940; Wed, 7 Sep 2011 20:12:29 +0200 Date: Wed, 7 Sep 2011 20:12:29 +0200 From: Jakub Jelinek To: uros@redhat.com Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] Fix up mode attribute on integer vector andnot, and, or and xor (PR target/50310) Message-ID: <20110907181229.GM2687@tyan-ft48-01.lab.bos.redhat.com> Reply-To: Jakub Jelinek MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi! This patch fixes a breakage introduced by the AVX2 changes. On the attached testcase even with -O3 -mavx -mno-avx2 we generate code that uses AVX2 insns. The immediate problem has been a thinko in what GET_MODE_SIZE returns - it is byte size instead of bit size. But the following patch also makes sure that get_attr_mode for those insns doesn't unconditionally return OImode even for 16-byte vectors with -mavx2 (when it should return TImode - perhaps scheduling or some other attributes do care if it is accurate) and removes redundant cases in sseinsnmode mode_attr (the integer 32-byte vector modes are present already at the beginning of define_mode_attr). Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2011-09-07 Jakub Jelinek * config/i386/sse.md (sseinsnmode): Remove 32-byte integer vector duplicates. PR target/50310 * config/i386/sse.md (*andnot3, *3): Fix up "mode" attribute computation. * gcc.dg/pr50310-1.c: New test. Jakub --- gcc/config/i386/sse.md.jj 2011-09-02 16:29:38.000000000 +0200 +++ gcc/config/i386/sse.md 2011-09-07 09:40:52.000000000 +0200 @@ -229,7 +229,7 @@ (define_mode_attr sseinsnmode (V16QI "TI") (V8HI "TI") (V4SI "TI") (V2DI "TI") (V1TI "TI") (V8SF "V8SF") (V4DF "V4DF") (V4SF "V4SF") (V2DF "V2DF") - (TI "TI") (V32QI "OI") (V16HI "OI") (V8SI "OI") (V4DI "OI")]) + (TI "TI")]) ;; Mapping of vector float modes to an integer mode of the same size (define_mode_attr sseintvecmode @@ -6340,14 +6340,13 @@ (define_insn "*andnot3" (const_string "*"))) (set_attr "prefix" "orig,vex") (set (attr "mode") - (cond [(match_test "TARGET_AVX2") - (const_string "OI") - (match_test "GET_MODE_SIZE (mode) > 128") + (cond [(and (not (match_test "TARGET_AVX2")) + (match_test "GET_MODE_SIZE (mode) > 16")) (const_string "V8SF") - (match_test "TARGET_SSE2") - (const_string "TI") + (not (match_test "TARGET_SSE2")) + (const_string "V4SF") ] - (const_string "V4SF")))]) + (const_string "")))]) (define_expand "3" [(set (match_operand:VI 0 "register_operand" "") @@ -6416,14 +6415,13 @@ (define_insn "*3" (const_string "*"))) (set_attr "prefix" "orig,vex") (set (attr "mode") - (cond [(match_test "TARGET_AVX2") - (const_string "OI") - (match_test "GET_MODE_SIZE (mode) > 128") + (cond [(and (not (match_test "TARGET_AVX2")) + (match_test "GET_MODE_SIZE (mode) > 16")) (const_string "V8SF") - (match_test "TARGET_SSE2") - (const_string "TI") + (not (match_test "TARGET_SSE2")) + (const_string "V4SF") ] - (const_string "V4SF")))]) + (const_string "")))]) (define_insn "*andnottf3" [(set (match_operand:TF 0 "register_operand" "=x,x") --- gcc/testsuite/gcc.dg/pr50310-1.c.jj 2011-09-07 09:00:39.000000000 +0200 +++ gcc/testsuite/gcc.dg/pr50310-1.c 2011-09-07 08:59:58.000000000 +0200 @@ -0,0 +1,18 @@ +/* PR target/50310 */ +/* { dg-do run } */ +/* { dg-options "-O3" } */ +/* { dg-options "-O3 -mavx -mno-avx2" { target avx_runtime } } */ + +double s1[4], s2[4]; +long long e[4]; + +int +main () +{ + int i; + asm volatile ("" : : : "memory"); + for (i = 0; i < 4; i++) + e[i] = __builtin_isunordered (s1[i], s2[i]) && s1[i] != s2[i] ? -1 : 0; + asm volatile ("" : : : "memory"); + return 0; +}