From patchwork Wed May 18 20:37:23 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 96224 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 671D5B6F68 for ; Thu, 19 May 2011 06:37:42 +1000 (EST) Received: (qmail 7548 invoked by alias); 18 May 2011 20:37:40 -0000 Received: (qmail 7449 invoked by uid 22791); 18 May 2011 20:37:39 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, TW_AV, TW_VX, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 18 May 2011 20:37:24 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 18 May 2011 13:37:23 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by orsmga001.jf.intel.com with ESMTP; 18 May 2011 13:37:23 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 5C82B180E02; Wed, 18 May 2011 13:37:23 -0700 (PDT) Date: Wed, 18 May 2011 13:37:23 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak , Kirill Yukhin Subject: PATCH: PR target/49002: 128-bit AVX load incorrectly becomes 256-bit AVX load Message-ID: <20110518203723.GA16368@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, This patch properly handles 256bit load cast. OK for trunk if there is no regression? I will also prepare a patch for 4.6 branch. Thanks. H.J. --- gcc/ 2011-05-18 H.J. Lu PR target/49002 * config/i386/sse.md (avx__): Properly handle load cast. gcc/testsuite/ 2011-05-18 H.J. Lu PR target/49002 * gcc.target/i386/pr49002-1.c: New test. * gcc.target/i386/pr49002-2.c: Likewise. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 291bffb..cf12a6d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -10294,12 +10294,13 @@ "&& reload_completed" [(const_int 0)] { + rtx op0 = operands[0]; rtx op1 = operands[1]; - if (REG_P (op1)) + if (REG_P (op0)) + op0 = gen_rtx_REG (mode, REGNO (op0)); + else op1 = gen_rtx_REG (mode, REGNO (op1)); - else - op1 = gen_lowpart (mode, op1); - emit_move_insn (operands[0], op1); + emit_move_insn (op0, op1); DONE; }) diff --git a/gcc/testsuite/gcc.target/i386/pr49002-1.c b/gcc/testsuite/gcc.target/i386/pr49002-1.c new file mode 100644 index 0000000..7553e82 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr49002-1.c @@ -0,0 +1,16 @@ +/* PR target/49002 */ +/* { dg-do compile } */ +/* { dg-options "-O -mavx" } */ + +#include + +void foo(const __m128d *from, __m256d *to, int s) +{ + __m256d var = _mm256_castpd128_pd256(from[0]); + var = _mm256_insertf128_pd(var, from[s], 1); + to[0] = var; +} + +/* Ensure we load into xmm, not ymm. */ +/* { dg-final { scan-assembler-not "vmovapd\[\t \]*\[^,\]*,\[\t \]*%ymm" } } */ +/* { dg-final { scan-assembler "vmovapd\[\t \]*\[^,\]*,\[\t \]*%xmm" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr49002-2.c b/gcc/testsuite/gcc.target/i386/pr49002-2.c new file mode 100644 index 0000000..b0e1009 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr49002-2.c @@ -0,0 +1,14 @@ +/* PR target/49002 */ +/* { dg-do compile } */ +/* { dg-options "-O -mavx" } */ + +#include + +void foo(const __m128d from, __m256d *to) +{ + *to = _mm256_castpd128_pd256(from); +} + +/* Ensure we store ymm, not xmm. */ +/* { dg-final { scan-assembler-not "vmovapd\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */ +/* { dg-final { scan-assembler "vmovapd\[\t \]*%ymm\[0-9\]\+,\[^,\]*" } } */