From patchwork Mon Mar 14 21:00:25 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 86818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 6CDAAB703F for ; Tue, 15 Mar 2011 08:00:37 +1100 (EST) Received: (qmail 21909 invoked by alias); 14 Mar 2011 21:00:35 -0000 Received: (qmail 21898 invoked by uid 22791); 14 Mar 2011 21:00:34 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from e6.ny.us.ibm.com (HELO e6.ny.us.ibm.com) (32.97.182.146) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Mar 2011 21:00:30 +0000 Received: from d01dlp02.pok.ibm.com (d01dlp02.pok.ibm.com [9.56.224.85]) by e6.ny.us.ibm.com (8.14.4/8.13.1) with ESMTP id p2EKaBrt032717 for ; Mon, 14 Mar 2011 16:36:11 -0400 Received: from d01relay04.pok.ibm.com (d01relay04.pok.ibm.com [9.56.227.236]) by d01dlp02.pok.ibm.com (Postfix) with ESMTP id 34D7D6E8036 for ; Mon, 14 Mar 2011 17:00:28 -0400 (EDT) Received: from d03av04.boulder.ibm.com (d03av04.boulder.ibm.com [9.17.195.170]) by d01relay04.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p2EL0REp171742 for ; Mon, 14 Mar 2011 17:00:27 -0400 Received: from d03av04.boulder.ibm.com (loopback [127.0.0.1]) by d03av04.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p2EL0RFv014803 for ; Mon, 14 Mar 2011 15:00:27 -0600 Received: from hungry-tiger.westford.ibm.com (dyn9033037078.westford.ibm.com [9.33.37.78]) by d03av04.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p2EL0Rv7014737; Mon, 14 Mar 2011 15:00:27 -0600 Received: by hungry-tiger.westford.ibm.com (Postfix, from userid 500) id F3044F7DD8; Mon, 14 Mar 2011 17:00:25 -0400 (EDT) Date: Mon, 14 Mar 2011 17:00:25 -0400 From: Michael Meissner To: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com Subject: [PATCH, committed] Refix 48053, do not abort in loading 0 into VSX register under 32-bit Message-ID: <20110314210025.GA16261@hungry-tiger.westford.ibm.com> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-Content-Scanned: Fidelis XPS MAILER X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org After the fix for 48053 was installed, we discovered that if reload wanted to load a 0 into a VSX register, it would fail on 32-bit. This is due to the fact that a define_split was trying to break the load into 2 separate GPR registers, but in this case there is only a single VSX register. I bootstrapped the compiler with the patch and ran make check with no regressions before committing the change. 2011-03-14 Michael Meissner * config/rs6000/rs6000.md (movdi split for 32-bit): Don't split up 64-bit constants being loaded into registers other than GPRs such as loading 0 into a VSX register. Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 170943) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -10071,7 +10071,8 @@ (define_insn "*movdi_internal32" (define_split [(set (match_operand:DI 0 "gpc_reg_operand" "") (match_operand:DI 1 "const_int_operand" ""))] - "! TARGET_POWERPC64 && reload_completed" + "! TARGET_POWERPC64 && reload_completed + && gpr_or_gpr_p (operands[0], operands[1])" [(set (match_dup 2) (match_dup 4)) (set (match_dup 3) (match_dup 1))] "