From patchwork Tue Jan 25 02:16:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 80302 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 5D449B7124 for ; Tue, 25 Jan 2011 13:17:03 +1100 (EST) Received: (qmail 2168 invoked by alias); 25 Jan 2011 02:17:01 -0000 Received: (qmail 2112 invoked by uid 22791); 25 Jan 2011 02:17:00 -0000 X-SWARE-Spam-Status: No, hits=-3.7 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, RCVD_IN_DNSWL_HI, SARE_HEAD_8BIT_SPAM, SARE_SUB_ENC_UTF8, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 25 Jan 2011 02:16:54 +0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 24 Jan 2011 18:16:52 -0800 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by fmsmga001.fm.intel.com with ESMTP; 24 Jan 2011 18:16:52 -0800 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 9CC1D18091A; Mon, 24 Jan 2011 18:16:52 -0800 (PST) Date: Mon, 24 Jan 2011 18:16:52 -0800 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: PATCH: PR middle-end/47449: =?utf-8?B?W3gz?= =?utf-8?Q?2=5D_can=E2=80=99t_find_a_register_in_class_=E2=80=98DIREG?= =?utf-8?B?4oCZIHdoaWxlIHJlbG9hZGluZyDigJhhc23igJk=?= Message-ID: <20110125021652.GA21397@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, fwprop propagates zero/sign extended hard registers while not propagating hard registers in propagate_rtx. This patch avoids propagating zero/sign extended hard registers. OK for 4.7? Thanks. H.J. --- commit 9fe3f4242e370b5728223e4198eb34b82eaa7e33 Author: H.J. Lu Date: Mon Jan 24 18:11:35 2011 -0800 Don't propagate zero/sign extended hard register. diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32 index ebe1d13..761799f 100644 --- a/gcc/ChangeLog.x32 +++ b/gcc/ChangeLog.x32 @@ -1,5 +1,11 @@ 2011-01-24 H.J. Lu + PR middle-end/47449 + * fwprop.c (forward_propagate_subreg): Don't propagate zero/sign + extended hard register. + +2011-01-24 H.J. Lu + PR target/47446 * config/i386/i386.c (ix86_output_addr_vec_elt): Check TARGET_LP64 instead of TARGET_64BIT for ASM_QUAD. diff --git a/gcc/fwprop.c b/gcc/fwprop.c index 7ff5135..866cbe3 100644 --- a/gcc/fwprop.c +++ b/gcc/fwprop.c @@ -1119,6 +1119,7 @@ forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set) if ((GET_CODE (src) == ZERO_EXTEND || GET_CODE (src) == SIGN_EXTEND) && REG_P (XEXP (src, 0)) + && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER && GET_MODE (XEXP (src, 0)) == use_mode && !free_load_extend (src, def_insn) && all_uses_available_at (def_insn, use_insn)) diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32 index 506585d..271a2ae 100644 --- a/gcc/testsuite/ChangeLog.x32 +++ b/gcc/testsuite/ChangeLog.x32 @@ -1,5 +1,10 @@ 2011-01-24 H.J. Lu + PR middle-end/47449 + * gcc.target/i386/pr47449.c: New. + +2011-01-24 H.J. Lu + PR target/47446 * gcc.target/i386/pr47446-1.c: New. diff --git a/gcc/testsuite/gcc.target/i386/pr47449.c b/gcc/testsuite/gcc.target/i386/pr47449.c new file mode 100644 index 0000000..99ef32f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr47449.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void bar (void *, void *); +int +foo (void *p1, void *p2) +{ + int ret1, ret2; + __asm ("" : "=D" (ret1), "=S" (ret2)); + bar (p1, p2); + return ret1 + ret2; +}