diff mbox

PATCH: Simplify mnemonic suffix iterators in sse.md

Message ID 20100617184358.GA13038@intel.com
State New
Headers show

Commit Message

H.J. Lu June 17, 2010, 6:43 p.m. UTC 
Hi,

There are 6 suffix iterators for instruction mnemonic in sse.md, which
basically do similar things. This patch replace 6 iterators with 2. OK
for trunk if there are no regressions?

Thanks.


H.J.
---
2010-06-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/sse.md (fma4modesuffixf4): Removed.
	(ssemodesuffixf2s): Likewise.
	(ssemodesuffixf4): Likewise.
	(ssemodesuffixf2c): Likewise.
	(ssescalarmodesuffix2s): Likewise.
	(avxmodesuffixf2c): Likewise.
	(sse_mnemonic_suffix): New.
	(sse_mnemonic_scalar_suffix): Likewise.
	Update patterns with sse_mnemonic_suffix and
	sse_mnemonic_scalar_suffix.

Comments

Uros Bizjak June 19, 2010, 8:39 a.m. UTC | #1 
On Thu, 2010-06-17 at 11:43 -0700, H.J. Lu wrote:

> There are 6 suffix iterators for instruction mnemonic in sse.md, which
> basically do similar things. This patch replace 6 iterators with 2. OK
> for trunk if there are no regressions?

> 2010-06-17  H.J. Lu  <hongjiu.lu@intel.com>
> 
> 	* config/i386/sse.md (fma4modesuffixf4): Removed.
> 	(ssemodesuffixf2s): Likewise.
> 	(ssemodesuffixf4): Likewise.
> 	(ssemodesuffixf2c): Likewise.
> 	(ssescalarmodesuffix2s): Likewise.
> 	(avxmodesuffixf2c): Likewise.
> 	(sse_mnemonic_suffix): New.
> 	(sse_mnemonic_scalar_suffix): Likewise.
> 	Update patterns with sse_mnemonic_suffix and
> 	sse_mnemonic_scalar_suffix.

Ok, but please name new suffixes ssemodesuffix and ssescalarmodesuffix
to be consistent with other patterns.

Thanks,
Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 7625906..de8405d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -89,18 +89,13 @@ 
 ;; Mapping from integer vector mode to mnemonic suffix
 (define_mode_attr ssevecsize [(V16QI "b") (V8HI "w") (V4SI "d") (V2DI "q")])
 
-;; Mapping of the fma4 suffix
-(define_mode_attr fma4modesuffixf4 [(V8SF "ps") (V4DF "pd")])
-(define_mode_attr ssemodesuffixf2s [(SF "ss") (DF "sd")
-				    (V4SF "ss") (V2DF "sd")])
-
-;; Mapping of the avx suffix
-(define_mode_attr ssemodesuffixf4 [(SF "ss") (DF "sd")
-				   (V4SF "ps") (V2DF "pd")])
-
-(define_mode_attr ssemodesuffixf2c [(V4SF "s") (V2DF "d")])
-
-(define_mode_attr ssescalarmodesuffix2s [(V4SF "ss") (V4SI "d")])
+;; Mapping of the insn mnemonic suffix
+(define_mode_attr sse_mnemonic_suffix
+  [(SF "ss") (DF "sd") (V4SF "ps") (V2DF "pd") (V8SF "ps") (V4DF "pd")
+   (V8SI "ps") (V4DI "pd")])
+(define_mode_attr sse_mnemonic_scalar_suffix 
+  [(SF "ss") (DF "sd") (V4SF "ss") (V2DF "sd") (V8SF "ss") (V4DF "sd")
+   (V4SI "d")])
 
 ;; Mapping of the max integer size for xop rotate immediate constraint
 (define_mode_attr sserotatemax [(V16QI "7") (V8HI "15") (V4SI "31") (V2DI "63")])
@@ -141,8 +136,6 @@ 
   [(V4SF "V4SI") (V8SF "V8SI") (V4SI "V4SF") (V8SI "V8SF")])
 (define_mode_attr avxpermvecmode
   [(V2DF "V2DI") (V4SF "V4SI") (V4DF "V4DI") (V8SF "V8SI")])
-(define_mode_attr avxmodesuffixf2c
-  [(V4SF "s") (V2DF "d") (V8SI "s") (V8SF "s") (V4DI "d") (V4DF "d")])
 (define_mode_attr avxmodesuffixp
  [(V2DF "pd") (V4SI "si") (V4SF "ps") (V8SF "ps") (V8SI "si")
   (V4DF "pd")])
@@ -366,14 +359,14 @@ 
   DONE;
 })
 
-(define_insn "avx_movup<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_movu<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")]
 	  UNSPEC_MOVU))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-  "vmovup<avxmodesuffixf2c>\t{%1, %0|%0, %1}"
+  "vmovu<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "movu" "1")
    (set_attr "prefix" "vex")
@@ -392,14 +385,14 @@ 
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
 
-(define_insn "<sse>_movup<ssemodesuffixf2c>"
+(define_insn "<sse>_movu<sse_mnemonic_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m")
 	(unspec:SSEMODEF2P
 	  [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")]
 	  UNSPEC_MOVU))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-  "movup<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
+  "movu<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "movu" "1")
    (set_attr "mode" "<MODE>")])
@@ -433,7 +426,7 @@ 
 	  [(match_operand:AVXMODEF2P 1 "register_operand" "x")]
 	  UNSPEC_MOVNT))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vmovntp<avxmodesuffixf2c>\t{%1, %0|%0, %1}"
+  "vmovnt<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
@@ -444,7 +437,7 @@ 
 	  [(match_operand:SSEMODEF2P 1 "register_operand" "x")]
 	  UNSPEC_MOVNT))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "movntp<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
+  "movnt<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "mode" "<MODE>")])
 
@@ -565,7 +558,7 @@ 
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)
    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
-  "v<plusminus_mnemonic>p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "v<plusminus_mnemonic><sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -585,7 +578,7 @@ 
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)
    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
-  "<plusminus_mnemonic>p<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "<plusminus_mnemonic><sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<MODE>")])
 
@@ -598,7 +591,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "AVX128_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "v<plusminus_mnemonic>s<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "v<plusminus_mnemonic><sse_mnemonic_scalar_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -612,7 +605,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "<plusminus_mnemonic>s<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "<plusminus_mnemonic><sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -631,7 +624,7 @@ 
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)
    && ix86_binary_operator_ok (MULT, <MODE>mode, operands)"
-  "vmulp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vmul<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssemul")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -651,7 +644,7 @@ 
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)
    && ix86_binary_operator_ok (MULT, <MODE>mode, operands)"
-  "mulp<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "mul<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssemul")
    (set_attr "mode" "<MODE>")])
 
@@ -664,7 +657,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vmuls<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vmul<sse_mnemonic_scalar_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssemul")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -678,7 +671,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "muls<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "mul<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssemul")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -713,7 +706,7 @@ 
 	  (match_operand:AVXMODEF2P 1 "register_operand" "x")
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vdivp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vdiv<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssediv")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
@@ -747,7 +740,7 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "x")
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX128_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vdivp<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vdiv<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssediv")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
@@ -758,7 +751,7 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "0")
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "divp<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "div<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssediv")
    (set_attr "mode" "<MODE>")])
 
@@ -771,7 +764,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "AVX128_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vdivs<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vdiv<sse_mnemonic_scalar_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssediv")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -785,7 +778,7 @@ 
 	  (match_dup 1)
 	  (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "divs<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "div<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssediv")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -909,7 +902,7 @@ 
 	  (match_operand:SSEMODEF2P 2 "register_operand" "x")
 	  (const_int 1)))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vsqrts<ssemodesuffixf2c>\t{%1, %2, %0|%0, %2, %1}"
+  "vsqrt<sse_mnemonic_scalar_suffix>\t{%1, %2, %0|%0, %2, %1}"
   [(set_attr "type" "sse")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -922,7 +915,7 @@ 
 	  (match_operand:SSEMODEF2P 2 "register_operand" "0")
 	  (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "sqrts<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
+  "sqrt<sse_mnemonic_scalar_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "atom_sse_attr" "sqrt")
    (set_attr "mode" "<ssescalarmode>")])
@@ -1027,7 +1020,7 @@ 
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode) && flag_finite_math_only
    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
-  "v<maxmin_float>p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "v<maxmin_float><sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
@@ -1039,7 +1032,7 @@ 
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode) && flag_finite_math_only
    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
-  "<maxmin_float>p<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "<maxmin_float><sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<MODE>")])
 
@@ -1049,7 +1042,7 @@ 
 	  (match_operand:AVXMODEF2P 1 "nonimmediate_operand" "%x")
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "v<maxmin_float>p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "v<maxmin_float><sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -1060,7 +1053,7 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "0")
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "<maxmin_float>p<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "<maxmin_float><sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<MODE>")])
 
@@ -1073,7 +1066,7 @@ 
 	 (match_dup 1)
 	 (const_int 1)))]
   "AVX128_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "v<maxmin_float>s<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "v<maxmin_float><sse_mnemonic_scalar_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sse")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -1087,7 +1080,7 @@ 
 	 (match_dup 1)
 	 (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "<maxmin_float>s<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "<maxmin_float><sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -1104,7 +1097,7 @@ 
 	   (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")]
 	 UNSPEC_IEEE_MIN))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vminp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vmin<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -1116,7 +1109,7 @@ 
 	   (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")]
 	 UNSPEC_IEEE_MAX))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vmaxp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vmax<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -1128,7 +1121,7 @@ 
 	   (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")]
 	 UNSPEC_IEEE_MIN))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "minp<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "min<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<MODE>")])
 
@@ -1139,7 +1132,7 @@ 
 	   (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")]
 	 UNSPEC_IEEE_MAX))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "maxp<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "max<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "<MODE>")])
 
@@ -1438,7 +1431,7 @@ 
 ;;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-(define_insn "avx_cmpp<avxmodesuffixf2c><mode>3"
+(define_insn "avx_cmp<sse_mnemonic_suffix><mode>3"
   [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "register_operand" "x")
@@ -1446,13 +1439,13 @@ 
 	   (match_operand:SI 3 "const_0_to_31_operand" "n")]
 	  UNSPEC_PCMP))]
   "TARGET_AVX"
-  "vcmpp<avxmodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vcmp<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssecmp")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "avx_cmps<ssemodesuffixf2c><mode>3"
+(define_insn "avx_cmp<sse_mnemonic_scalar_suffix><mode>3"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "")
 	(vec_merge:SSEMODEF2P
 	  (unspec:SSEMODEF2P
@@ -1463,7 +1456,7 @@ 
 	 (match_dup 1)
 	 (const_int 1)))]
   "TARGET_AVX"
-  "vcmps<ssemodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vcmp<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssecmp")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
@@ -1477,7 +1470,7 @@ 
 		[(match_operand:AVXMODEF2P 1 "register_operand" "x")
 		 (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")]))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vcmp%D3p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vcmp%D3<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
    (set_attr "prefix" "vex")
    (set_attr "length_immediate" "1")
@@ -1490,7 +1483,7 @@ 
 		 (match_operand:SSEMODEF4 2 "nonimmediate_operand" "xm")]))]
   "!TARGET_XOP 
   && (SSE_FLOAT_MODE_P (<MODE>mode) || SSE_VEC_FLOAT_MODE_P (<MODE>mode))"
-  "cmp%D3<ssemodesuffixf4>\t{%2, %0|%0, %2}"
+  "cmp%D3<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssecmp")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "<MODE>")])
@@ -1504,7 +1497,7 @@ 
 	 (match_dup 1)
 	 (const_int 1)))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vcmp%D3s<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vcmp%D3<sse_mnemonic_scalar_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<ssescalarmode>")])
@@ -1518,7 +1511,7 @@ 
 	 (match_dup 1)
 	 (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "cmp%D3s<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "cmp%D3<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssecmp")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "<ssescalarmode>")])
@@ -1592,7 +1585,7 @@ 
 	    (match_operand:AVXMODEF2P 1 "register_operand" "x"))
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")))]
   "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vandnp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vandn<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
@@ -1604,7 +1597,7 @@ 
 	    (match_operand:SSEMODEF2P 1 "register_operand" "0"))
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "andnp<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
+  "andn<sse_mnemonic_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sselog")
    (set_attr "mode" "<MODE>")])
 
@@ -1627,7 +1620,7 @@ 
   if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
     return "v<logic>ps\t{%2, %1, %0|%0, %1, %2}";
   else
-    return "v<logic>p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}";
+    return "v<logic><sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}";
 }
   [(set_attr "type" "sselog")
    (set_attr "prefix" "vex")
@@ -1652,7 +1645,7 @@ 
   if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
     return "<logic>ps\t{%2, %0|%0, %2}";
   else
-    return "<logic>p<ssemodesuffixf2c>\t{%2, %0|%0, %2}";
+    return "<logic><sse_mnemonic_suffix>\t{%2, %0|%0, %2}";
 }
   [(set_attr "type" "sselog")
    (set_attr "mode" "<MODE>")])
@@ -1761,7 +1754,7 @@ 
 	  (match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1774,7 +1767,7 @@ 
 	  (match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1788,7 +1781,7 @@ 
 	  (match_operand:FMA4MODEF4 1 "nonimmediate_operand" "%x,x")
 	  (match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1802,7 +1795,7 @@ 
 	  (match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1814,7 +1807,7 @@ 
 	  (match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1832,7 +1825,7 @@ 
 	 (match_dup 0)
 	 (const_int 1)))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1846,7 +1839,7 @@ 
 	  (match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1864,7 +1857,7 @@ 
 	 (match_dup 0)
 	 (const_int 1)))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1878,7 +1871,7 @@ 
 	  (match_operand:SSEMODEF4 1 "nonimmediate_operand" "%x,x")
 	  (match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1896,7 +1889,7 @@ 
 	 (match_dup 0)
 	 (const_int 1)))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1911,7 +1904,7 @@ 
 	  (match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
 	 (match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1930,7 +1923,7 @@ 
 	 (match_dup 0)
 	 (const_int 1)))]
   "TARGET_FMA4 && TARGET_FUSED_MADD"
-  "vfnmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1944,7 +1937,7 @@ 
 	   (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1958,7 +1951,7 @@ 
 	   (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1972,7 +1965,7 @@ 
 	    (match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m")))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -1987,7 +1980,7 @@ 
 	   (match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -2001,7 +1994,7 @@ 
 	   (match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -2015,7 +2008,7 @@ 
 	   (match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -2029,7 +2022,7 @@ 
 	    (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m")))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -2044,7 +2037,7 @@ 
 	   (match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<MODE>")])
 
@@ -2063,7 +2056,7 @@ 
 	   (const_int 1))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmadd<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -2080,7 +2073,7 @@ 
 	   (const_int 1))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfmsub<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -2097,7 +2090,7 @@ 
 	   (const_int 1))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmadd<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -2115,7 +2108,7 @@ 
 	   (const_int 1))]
 	 UNSPEC_FMA4_INTRINSIC))]
   "TARGET_FMA4"
-  "vfnmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vfnmsub<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemuladd")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -3984,7 +3977,7 @@ 
   "TARGET_AVX"
   "@
    vinsertps\t{$0xe, %2, %2, %0|%0, %2, %2, 0xe}
-   vmov<ssescalarmodesuffix2s>\t{%2, %0|%0, %2}
+   vmov<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}
    vmovd\t{%2, %0|%0, %2}
    vmovss\t{%2, %1, %0|%0, %1, %2}
    vpinsrd\t{$0, %2, %1, %0|%0, %1, %2, 0}
@@ -4006,7 +3999,7 @@ 
   "TARGET_SSE4_1"
   "@
    insertps\t{$0xe, %2, %0|%0, %2, 0xe}
-   mov<ssescalarmodesuffix2s>\t{%2, %0|%0, %2}
+   mov<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}
    movd\t{%2, %0|%0, %2}
    movss\t{%2, %0|%0, %2}
    pinsrd\t{$0, %2, %0|%0, %2, 0}
@@ -4026,7 +4019,7 @@ 
 	  (const_int 1)))]
   "TARGET_SSE2"
   "@
-   mov<ssescalarmodesuffix2s>\t{%2, %0|%0, %2}
+   mov<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}
    movd\t{%2, %0|%0, %2}
    movss\t{%2, %0|%0, %2}
    #"
@@ -8031,24 +8024,24 @@ 
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
-(define_insn "avx_movmskp<avxmodesuffixf2c>256"
+(define_insn "avx_movmsk<sse_mnemonic_suffix>256"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(unspec:SI
 	  [(match_operand:AVX256MODEF2P 1 "register_operand" "x")]
 	  UNSPEC_MOVMSK))]
   "AVX256_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "vmovmskp<avxmodesuffixf2c>\t{%1, %0|%0, %1}"
+  "vmovmsk<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "<sse>_movmskp<ssemodesuffixf2c>"
+(define_insn "<sse>_movmsk<sse_mnemonic_suffix>"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(unspec:SI
 	  [(match_operand:SSEMODEF2P 1 "register_operand" "x")]
 	  UNSPEC_MOVMSK))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-  "%vmovmskp<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
+  "%vmovmsk<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<MODE>")])
@@ -9288,7 +9281,7 @@ 
 	     (parallel [(const_int 0)]))]
 	  UNSPEC_MOVNT))]
   "TARGET_SSE4A"
-  "movnts<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
+  "movnt<sse_mnemonic_scalar_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "mode" "<ssescalarmode>")])
 
@@ -9349,21 +9342,21 @@ 
 ;;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-(define_insn "avx_blendp<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_blend<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x")
 	(vec_merge:AVXMODEF2P
 	  (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm")
 	  (match_operand:AVXMODEF2P 1 "register_operand" "x")
 	  (match_operand:SI 3 "const_0_to_<blendbits>_operand" "n")))]
   "TARGET_AVX"
-  "vblendp<avxmodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vblend<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
-(define_insn "avx_blendvp<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_blendv<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "register_operand" "x")
@@ -9371,28 +9364,28 @@ 
 	   (match_operand:AVXMODEF2P 3 "register_operand" "x")]
 	  UNSPEC_BLENDV))]
   "TARGET_AVX"
-  "vblendvp<avxmodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vblendv<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
-(define_insn "sse4_1_blendp<ssemodesuffixf2c>"
+(define_insn "sse4_1_blend<sse_mnemonic_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
 	(vec_merge:SSEMODEF2P
 	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm")
 	  (match_operand:SSEMODEF2P 1 "register_operand" "0")
 	  (match_operand:SI 3 "const_0_to_<blendbits>_operand" "n")))]
   "TARGET_SSE4_1"
-  "blendp<ssemodesuffixf2c>\t{%3, %2, %0|%0, %2, %3}"
+  "blend<sse_mnemonic_suffix>\t{%3, %2, %0|%0, %2, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "sse4_1_blendvp<ssemodesuffixf2c>"
+(define_insn "sse4_1_blendv<sse_mnemonic_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "reg_not_xmm0_operand" "=x")
 	(unspec:SSEMODEF2P
 	  [(match_operand:SSEMODEF2P 1 "reg_not_xmm0_operand" "0")
@@ -9400,13 +9393,13 @@ 
 	   (match_operand:SSEMODEF2P 3 "register_operand" "Yz")]
 	  UNSPEC_BLENDV))]
   "TARGET_SSE4_1"
-  "blendvp<ssemodesuffixf2c>\t{%3, %2, %0|%0, %2, %3}"
+  "blendv<sse_mnemonic_suffix>\t{%3, %2, %0|%0, %2, %3}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "avx_dpp<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_dp<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "%x")
@@ -9414,14 +9407,14 @@ 
 	   (match_operand:SI 3 "const_0_to_255_operand" "n")]
 	  UNSPEC_DP))]
   "TARGET_AVX"
-  "vdpp<avxmodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vdp<sse_mnemonic_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssemul")
    (set_attr "prefix" "vex")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "<avxvecmode>")])
 
-(define_insn "sse4_1_dpp<ssemodesuffixf2c>"
+(define_insn "sse4_1_dp<sse_mnemonic_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
 	(unspec:SSEMODEF2P
 	  [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "%0")
@@ -9429,7 +9422,7 @@ 
 	   (match_operand:SI 3 "const_0_to_255_operand" "n")]
 	  UNSPEC_DP))]
   "TARGET_SSE4_1"
-  "dpp<ssemodesuffixf2c>\t{%3, %2, %0|%0, %2, %3}"
+  "dp<sse_mnemonic_suffix>\t{%3, %2, %0|%0, %2, %3}"
   [(set_attr "type" "ssemul")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
@@ -9955,13 +9948,13 @@ 
 
 ;; ptestps/ptestpd are very similar to comiss and ucomiss when
 ;; setting FLAGS_REG. But it is not a really compare instruction.
-(define_insn "avx_vtestp<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_vtest<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (reg:CC FLAGS_REG)
 	(unspec:CC [(match_operand:AVXMODEF2P 0 "register_operand" "x")
 		    (match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm")]
 		   UNSPEC_VTESTP))]
   "TARGET_AVX"
-  "vtestp<avxmodesuffixf2c>\t{%1, %0|%0, %1}"
+  "vtest<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecomi")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex")
@@ -9993,28 +9986,28 @@ 
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
 
-(define_insn "avx_roundp<avxmodesuffixf2c>256"
+(define_insn "avx_round<sse_mnemonic_suffix>256"
   [(set (match_operand:AVX256MODEF2P 0 "register_operand" "=x")
 	(unspec:AVX256MODEF2P
 	  [(match_operand:AVX256MODEF2P 1 "nonimmediate_operand" "xm")
 	   (match_operand:SI 2 "const_0_to_15_operand" "n")]
 	  UNSPEC_ROUND))]
   "TARGET_AVX"
-  "vroundp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vround<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "sse4_1_roundp<ssemodesuffixf2c>"
+(define_insn "sse4_1_round<sse_mnemonic_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
 	(unspec:SSEMODEF2P
 	  [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm")
 	   (match_operand:SI 2 "const_0_to_15_operand" "n")]
 	  UNSPEC_ROUND))]
   "TARGET_ROUND"
-  "%vroundp<ssemodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "%vround<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
@@ -10022,7 +10015,7 @@ 
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "*avx_rounds<ssemodesuffixf2c>"
+(define_insn "*avx_round<sse_mnemonic_scalar_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
 	(vec_merge:SSEMODEF2P
 	  (unspec:SSEMODEF2P
@@ -10032,14 +10025,14 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "x")
 	  (const_int 1)))]
   "TARGET_AVX"
-  "vrounds<ssemodesuffixf2c>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  "vround<sse_mnemonic_scalar_suffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix_extra" "1")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "sse4_1_rounds<ssemodesuffixf2c>"
+(define_insn "sse4_1_round<sse_mnemonic_scalar_suffix>"
   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
 	(vec_merge:SSEMODEF2P
 	  (unspec:SSEMODEF2P
@@ -10049,7 +10042,7 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "0")
 	  (const_int 1)))]
   "TARGET_ROUND"
-  "rounds<ssemodesuffixf2c>\t{%3, %2, %0|%0, %2, %3}"
+  "round<sse_mnemonic_scalar_suffix>\t{%3, %2, %0|%0, %2, %3}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
@@ -11491,7 +11484,7 @@ 
 	 [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm")]
 	 UNSPEC_FRCZ))]
   "TARGET_XOP"
-  "vfrcz<ssemodesuffixf4>\t{%1, %0|%0, %1}"
+  "vfrcz<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt1")
    (set_attr "mode" "<MODE>")])
 
@@ -11505,7 +11498,7 @@ 
 	  (match_operand:SSEMODEF2P 1 "register_operand" "0")
 	  (const_int 1)))]
   "TARGET_XOP"
-  "vfrcz<ssemodesuffixf2s>\t{%2, %0|%0, %2}"
+  "vfrcz<sse_mnemonic_scalar_suffix>\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssecvt1")
    (set_attr "mode" "<MODE>")])
 
@@ -11515,7 +11508,7 @@ 
 	 [(match_operand:FMA4MODEF4 1 "nonimmediate_operand" "xm")]
 	 UNSPEC_FRCZ))]
   "TARGET_XOP"
-  "vfrcz<fma4modesuffixf4>\t{%1, %0|%0, %1}"
+  "vfrcz<sse_mnemonic_suffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt1")
    (set_attr "mode" "<MODE>")])
 
@@ -11595,7 +11588,7 @@ 
 	   (match_operand:SI 4 "const_0_to_3_operand" "n")]
 	  UNSPEC_VPERMIL2))]
   "TARGET_XOP"
-  "vpermil2p<avxmodesuffixf2c>\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}"
+  "vpermil2<sse_mnemonic_suffix>\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}"
   [(set_attr "type" "sse4arg")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "<MODE>")])
@@ -11812,7 +11805,7 @@ 
 	  (match_operand:<avxscalarmode> 1 "nonimmediate_operand" "m,?x")))]
   "TARGET_AVX"
   "@
-   vbroadcasts<avxmodesuffixf2c>\t{%1, %0|%0, %1}
+   vbroadcast<sse_mnemonic_scalar_suffix>\t{%1, %0|%0, %1}
    #"
   "&& reload_completed && REG_P (operands[1])"
   [(set (match_dup 2) (vec_duplicate:<avxhalfvecmode> (match_dup 1)))
@@ -11966,7 +11959,7 @@ 
 {
   int mask = avx_vpermilp_parallel (operands[2], <MODE>mode) - 1;
   operands[2] = GEN_INT (mask);
-  return "vpermilp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}";
+  return "vpermil<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}";
 }
   [(set_attr "type" "sselog")
    (set_attr "prefix_extra" "1")
@@ -11981,7 +11974,7 @@ 
 	   (match_operand:<avxpermvecmode> 2 "nonimmediate_operand" "xm")]
 	  UNSPEC_VPERMIL))]
   "TARGET_AVX"
-  "vpermilp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vpermil<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex")
@@ -12224,7 +12217,7 @@ 
    (set_attr "prefix" "vex")
    (set_attr "mode" "V8SF")])
 
-(define_insn "avx_maskloadp<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_maskload<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "memory_operand" "m")
@@ -12232,13 +12225,13 @@ 
 	   (match_dup 0)]
 	  UNSPEC_MASKLOAD))]
   "TARGET_AVX"
-  "vmaskmovp<avxmodesuffixf2c>\t{%1, %2, %0|%0, %2, %1}"
+  "vmaskmov<sse_mnemonic_suffix>\t{%1, %2, %0|%0, %2, %1}"
   [(set_attr "type" "sselog1")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "avx_maskstorep<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_maskstore<sse_mnemonic_suffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "memory_operand" "=m")
 	(unspec:AVXMODEF2P
 	  [(match_operand:AVXMODEF2P 1 "register_operand" "x")
@@ -12246,7 +12239,7 @@ 
 	   (match_dup 0)]
 	  UNSPEC_MASKSTORE))]
   "TARGET_AVX"
-  "vmaskmovp<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
+  "vmaskmov<sse_mnemonic_suffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog1")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex")