Message ID | 1619523128-14792-4-git-send-email-christophe.lyon@linaro.org |
---|---|
State | New |
Headers | show |
Series | testsuite/arm: Add mve-vadd-1.c test | expand |
On Tue, 27 Apr 2021 at 17:02, Christophe Lyon via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Support for vadd has been present for a while, but it was lacking a > test. > > 2021-04-22 Christophe Lyon <christophe.lyon@linaro.org> > > gcc/testsuite/ > * gcc.target/arm/simd/mve-vadd-1.c: New. > --- > gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > new file mode 100644 > index 0000000..15a9daa > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > @@ -0,0 +1,43 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > +/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-additional-options "-O3" } */ > + > +#include <stdint.h> > + > +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \ > + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ > + int i; \ > + for (i=0; i<NB; i++) { \ > + dest[i] = a[i] OP b[i]; \ > + } \ > +} > + > +/* 128-bit vectors. */ > +FUNC(s, int, 32, 4, +, vadd) > +FUNC(u, uint, 32, 4, +, vadd) > +FUNC(s, int, 16, 8, +, vadd) > +FUNC(u, uint, 16, 8, +, vadd) > +FUNC(s, int, 8, 16, +, vadd) > +FUNC(u, uint, 8, 16, +, vadd) Sorry to nitpick -- just wondering if it'd be slightly better to add another macro that will generate calls to FUNC with s, u variants ? Sth like: #define FUNC2(BITS, NB, OP, NAME) \ FUNC(s, int, BITS, NB, OP, NAME) \ FUNC(u, uint, BITS, NB, OP, NAME) and use: FUNC2(int, 32, 4, +, vadd) FUNC2(int, 16, 8, + vadd) FUNC2(int, 8, 16, +, vadd) Thanks, Prathamesh > + > +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > + > +void test_vadd_f32 (float * dest, float * a, float * b) { > + int i; > + for (i=0; i<4; i++) { > + dest[i] = a[i] + b[i]; > + } > +} > +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > + > +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > + int i; > + for (i=0; i<8; i++) { > + dest[i] = a[i] + b[i]; > + } > +} > +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > -- > 2.7.4 >
On Tue, 27 Apr 2021 at 14:04, Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> wrote: > > On Tue, 27 Apr 2021 at 17:02, Christophe Lyon via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: > > > > Support for vadd has been present for a while, but it was lacking a > > test. > > > > 2021-04-22 Christophe Lyon <christophe.lyon@linaro.org> > > > > gcc/testsuite/ > > * gcc.target/arm/simd/mve-vadd-1.c: New. > > --- > > gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++++++++++++++++++++++++++ > > 1 file changed, 43 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > new file mode 100644 > > index 0000000..15a9daa > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > @@ -0,0 +1,43 @@ > > +/* { dg-do compile } */ > > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > > +/* { dg-add-options arm_v8_1m_mve_fp } */ > > +/* { dg-additional-options "-O3" } */ > > + > > +#include <stdint.h> > > + > > +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ > > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \ > > + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ > > + int i; \ > > + for (i=0; i<NB; i++) { \ > > + dest[i] = a[i] OP b[i]; \ > > + } \ > > +} > > + > > +/* 128-bit vectors. */ > > +FUNC(s, int, 32, 4, +, vadd) > > +FUNC(u, uint, 32, 4, +, vadd) > > +FUNC(s, int, 16, 8, +, vadd) > > +FUNC(u, uint, 16, 8, +, vadd) > > +FUNC(s, int, 8, 16, +, vadd) > > +FUNC(u, uint, 8, 16, +, vadd) > Sorry to nitpick -- just wondering if it'd be slightly better to add > another macro that will generate calls to FUNC with s, u variants ? > > Sth like: > #define FUNC2(BITS, NB, OP, NAME) \ > FUNC(s, int, BITS, NB, OP, NAME) \ > FUNC(u, uint, BITS, NB, OP, NAME) > > and use: > FUNC2(int, 32, 4, +, vadd) > FUNC2(int, 16, 8, + vadd) > FUNC2(int, 8, 16, +, vadd) > Indeed we could do that, but several other mve-* tests use the same pattern I used here. Well, the ones I committed some time ago :-) The advantage is that when suitable we can use the same FUNC to expand the fp16 version. I tend to prefer my proposal because it's more obvious to me which types are used. Christophe > Thanks, > Prathamesh > > + > > +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > + > > +void test_vadd_f32 (float * dest, float * a, float * b) { > > + int i; > > + for (i=0; i<4; i++) { > > + dest[i] = a[i] + b[i]; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > > + > > +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > > + int i; > > + for (i=0; i<8; i++) { > > + dest[i] = a[i] + b[i]; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > > -- > > 2.7.4 > >
Ping? On Tue, 27 Apr 2021 at 13:32, Christophe Lyon <christophe.lyon@linaro.org> wrote: > > Support for vadd has been present for a while, but it was lacking a > test. > > 2021-04-22 Christophe Lyon <christophe.lyon@linaro.org> > > gcc/testsuite/ > * gcc.target/arm/simd/mve-vadd-1.c: New. > --- > gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > new file mode 100644 > index 0000000..15a9daa > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > @@ -0,0 +1,43 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > +/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-additional-options "-O3" } */ > + > +#include <stdint.h> > + > +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \ > + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ > + int i; \ > + for (i=0; i<NB; i++) { \ > + dest[i] = a[i] OP b[i]; \ > + } \ > +} > + > +/* 128-bit vectors. */ > +FUNC(s, int, 32, 4, +, vadd) > +FUNC(u, uint, 32, 4, +, vadd) > +FUNC(s, int, 16, 8, +, vadd) > +FUNC(u, uint, 16, 8, +, vadd) > +FUNC(s, int, 8, 16, +, vadd) > +FUNC(u, uint, 8, 16, +, vadd) > + > +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > + > +void test_vadd_f32 (float * dest, float * a, float * b) { > + int i; > + for (i=0; i<4; i++) { > + dest[i] = a[i] + b[i]; > + } > +} > +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > + > +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > + int i; > + for (i=0; i<8; i++) { > + dest[i] = a[i] + b[i]; > + } > +} > +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > -- > 2.7.4 >
ping? On Mon, 10 May 2021 at 13:22, Christophe Lyon <christophe.lyon@linaro.org> wrote: > > Ping? > > On Tue, 27 Apr 2021 at 13:32, Christophe Lyon > <christophe.lyon@linaro.org> wrote: > > > > Support for vadd has been present for a while, but it was lacking a > > test. > > > > 2021-04-22 Christophe Lyon <christophe.lyon@linaro.org> > > > > gcc/testsuite/ > > * gcc.target/arm/simd/mve-vadd-1.c: New. > > --- > > gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++++++++++++++++++++++++++ > > 1 file changed, 43 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > new file mode 100644 > > index 0000000..15a9daa > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > @@ -0,0 +1,43 @@ > > +/* { dg-do compile } */ > > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > > +/* { dg-add-options arm_v8_1m_mve_fp } */ > > +/* { dg-additional-options "-O3" } */ > > + > > +#include <stdint.h> > > + > > +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ > > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \ > > + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ > > + int i; \ > > + for (i=0; i<NB; i++) { \ > > + dest[i] = a[i] OP b[i]; \ > > + } \ > > +} > > + > > +/* 128-bit vectors. */ > > +FUNC(s, int, 32, 4, +, vadd) > > +FUNC(u, uint, 32, 4, +, vadd) > > +FUNC(s, int, 16, 8, +, vadd) > > +FUNC(u, uint, 16, 8, +, vadd) > > +FUNC(s, int, 8, 16, +, vadd) > > +FUNC(u, uint, 8, 16, +, vadd) > > + > > +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ > > + > > +void test_vadd_f32 (float * dest, float * a, float * b) { > > + int i; > > + for (i=0; i<4; i++) { > > + dest[i] = a[i] + b[i]; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > > + > > +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > > + int i; > > + for (i=0; i<8; i++) { > > + dest[i] = a[i] + b[i]; > > + } > > +} > > +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ > > -- > > 2.7.4 > >
> -----Original Message----- > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of > Christophe Lyon via Gcc-patches > Sent: 17 May 2021 10:54 > To: gcc Patches <gcc-patches@gcc.gnu.org> > Subject: Re: [PATCH] testsuite/arm: Add mve-vadd-1.c test > > ping? > > On Mon, 10 May 2021 at 13:22, Christophe Lyon > <christophe.lyon@linaro.org> wrote: > > > > Ping? > > > > On Tue, 27 Apr 2021 at 13:32, Christophe Lyon > > <christophe.lyon@linaro.org> wrote: > > > > > > Support for vadd has been present for a while, but it was lacking a > > > test. > > > Ok. Thanks, Kyrill > > > 2021-04-22 Christophe Lyon <christophe.lyon@linaro.org> > > > > > > gcc/testsuite/ > > > * gcc.target/arm/simd/mve-vadd-1.c: New. > > > --- > > > gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 > ++++++++++++++++++++++++++ > > > 1 file changed, 43 insertions(+) > > > create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > > > > > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > > new file mode 100644 > > > index 0000000..15a9daa > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c > > > @@ -0,0 +1,43 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > > > +/* { dg-add-options arm_v8_1m_mve_fp } */ > > > +/* { dg-additional-options "-O3" } */ > > > + > > > +#include <stdint.h> > > > + > > > +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ > > > + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * > __restrict__ dest, \ > > > + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ > > > + int i; \ > > > + for (i=0; i<NB; i++) { \ > > > + dest[i] = a[i] OP b[i]; \ > > > + } \ > > > +} > > > + > > > +/* 128-bit vectors. */ > > > +FUNC(s, int, 32, 4, +, vadd) > > > +FUNC(u, uint, 32, 4, +, vadd) > > > +FUNC(s, int, 16, 8, +, vadd) > > > +FUNC(u, uint, 16, 8, +, vadd) > > > +FUNC(s, int, 8, 16, +, vadd) > > > +FUNC(u, uint, 8, 16, +, vadd) > > > + > > > +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} > 2 } } */ > > > +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} > 2 } } */ > > > +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} > 2 } } */ > > > + > > > +void test_vadd_f32 (float * dest, float * a, float * b) { > > > + int i; > > > + for (i=0; i<4; i++) { > > > + dest[i] = a[i] + b[i]; > > > + } > > > +} > > > +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} > 1 } } */ > > > + > > > +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { > > > + int i; > > > + for (i=0; i<8; i++) { > > > + dest[i] = a[i] + b[i]; > > > + } > > > +} > > > +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} > 1 } } */ > > > -- > > > 2.7.4 > > >
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c new file mode 100644 index 0000000..15a9daa --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-additional-options "-O3" } */ + +#include <stdint.h> + +#define FUNC(SIGN, TYPE, BITS, NB, OP, NAME) \ + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \ + TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \ + int i; \ + for (i=0; i<NB; i++) { \ + dest[i] = a[i] OP b[i]; \ + } \ +} + +/* 128-bit vectors. */ +FUNC(s, int, 32, 4, +, vadd) +FUNC(u, uint, 32, 4, +, vadd) +FUNC(s, int, 16, 8, +, vadd) +FUNC(u, uint, 16, 8, +, vadd) +FUNC(s, int, 8, 16, +, vadd) +FUNC(u, uint, 8, 16, +, vadd) + +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vadd_f32 (float * dest, float * a, float * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] + b[i]; + } +} +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { + int i; + for (i=0; i<8; i++) { + dest[i] = a[i] + b[i]; + } +} +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */