From patchwork Wed Oct 10 15:14:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: will schmidt X-Patchwork-Id: 981948 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-487266-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vnet.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="Z09Vuz+5"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42Vd260zw2z9s3l for ; Thu, 11 Oct 2018 02:15:09 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:reply-to:to:cc:content-type:date:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=fuxsT OCLlXCBGItrGonXi/wrWDIoCOkD+YRG8xSLy39o0eJkBmKe3krFHgV4nHJQVB4Ip MbwrWV6BJExDXeTe6C6sRsTbVfTkggWVNDTH7eek9tgPENmDaPMzmLrSpE/j8Skx wuSSYyrLCYfQ9Rn+oFHXwKBoWJNhATWqJbVYLI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:reply-to:to:cc:content-type:date:mime-version :content-transfer-encoding:message-id; s=default; bh=cUA+c40ZeQL I84E0BDUrHNXIPLM=; b=Z09Vuz+5Vic2ksjyk8uh8nYTW/nQk9rbC09W3NBmpjW fZYSOs/z1sNin90QlFcSJjqnwjMf6bBxDTQp5hfi4tFNgA2ZR+QPSvmt/yR8EqmL dWlD1qZ9kPS3Ihva2B8OXirsRc2yku2stp7IS8qqSsp4SAKu2jHyxvzWrvNxIR70 = Received: (qmail 115593 invoked by alias); 10 Oct 2018 15:15:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 115186 invoked by uid 89); 10 Oct 2018 15:14:57 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=Six X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 10 Oct 2018 15:14:50 +0000 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w9AF0qPL120677 for ; Wed, 10 Oct 2018 11:14:49 -0400 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2n1hrwf1ee-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 10 Oct 2018 11:14:48 -0400 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 10 Oct 2018 11:14:45 -0400 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w9AFEid925100388 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Oct 2018 15:14:44 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 18406AE062; Wed, 10 Oct 2018 11:12:47 -0400 (EDT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C1F01AE05C; Wed, 10 Oct 2018 11:12:46 -0400 (EDT) Received: from [9.10.86.107] (unknown [9.10.86.107]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 10 Oct 2018 11:12:46 -0400 (EDT) Subject: [PATCH, rs6000] vec_extract testcase coverage From: Will Schmidt Reply-To: will_schmidt@vnet.ibm.com To: Segher Boessenkool , Bill Schmidt , David Edelsohn Cc: GCC Patches Date: Wed, 10 Oct 2018 10:14:42 -0500 Mime-Version: 1.0 x-cbid: 18101015-0060-0000-0000-000002BE7A4D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009854; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000268; SDB=6.01100666; UDB=6.00569490; IPR=6.00880715; MB=3.00023696; MTD=3.00000008; XFM=3.00000015; UTC=2018-10-10 15:14:46 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18101015-0061-0000-0000-000046CC301B Message-Id: <1539184482.16697.58.camel@brimstone.rchland.ibm.com> X-IsSubscribed: yes Hi, Testcase coverage for the vec_extract builtins. Due to codegen differences between (p7,p8,p9) targets, these have been split into bits and pieces as seen. Tested across assorted power linux platforms. OK for trunk? Thanks, -Will [testsuite] 2018-10-09 Will Schmidt * gcc.target/powerpc/fold-vec-extract-char.p7.c: New. * gcc.target/powerpc/fold-vec-extract-char.p8.c: New. * gcc.target/powerpc/fold-vec-extract-char.p9.c: New. * gcc.target/powerpc/fold-vec-extract-double.p7.c: New. * gcc.target/powerpc/fold-vec-extract-double.p8.c: New. * gcc.target/powerpc/fold-vec-extract-double.p9.c: New. * gcc.target/powerpc/fold-vec-extract-float.p7.c: New. * gcc.target/powerpc/fold-vec-extract-float.p8.c: New. * gcc.target/powerpc/fold-vec-extract-float.p9.c: New. * gcc.target/powerpc/fold-vec-extract-int.p7.c: New. * gcc.target/powerpc/fold-vec-extract-int.p8.c: New. * gcc.target/powerpc/fold-vec-extract-int.p9.c: New. * gcc.target/powerpc/fold-vec-extract-longlong.p7.c: New. * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: New. * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: New. * gcc.target/powerpc/fold-vec-extract-short.p7.c: New. * gcc.target/powerpc/fold-vec-extract-short.p8.c: New. * gcc.target/powerpc/fold-vec-extract-short.p9.c: New. diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c new file mode 100644 index 0000000..67acfe7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c @@ -0,0 +1,60 @@ +/* Verify that overloaded built-ins for vec_extract() with char + inputs produce the right code with a power7 (BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-maltivec -mcpu=power7 -O2" } */ + +// Six tests total. Targeting P7 (BE). +// P7 variable offset: addi, li, stxvw4x, rldicl, add, lbz, (extsb) +// P7 const offset: li, addi, stxvw4x, lbz, (extsb) +/* one extsb (extend sign-bit) instruction generated for each test against + unsigned types */ + +/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mli\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 3 } } */ +/* { dg-final { scan-assembler-times {\madd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlbz\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mextsb\M} 2 } } */ + +#include + +unsigned char +testbc_var (vector bool char vbc2, signed int si) +{ + return vec_extract (vbc2, si); +} + +signed char +testsc_var (vector signed char vsc2, signed int si) +{ + return vec_extract (vsc2, si); +} + +unsigned char +testuc_var (vector unsigned char vuc2, signed int si) +{ + return vec_extract (vuc2, si); +} + +unsigned char +testbc_cst (vector bool char vbc2) +{ + return vec_extract (vbc2, 12); +} + +signed char +testsc_cst (vector signed char vsc2) +{ + return vec_extract (vsc2, 12); +} + +unsigned char +testuc_cst (vector unsigned char vuc2) +{ + return vec_extract (vuc2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c new file mode 100644 index 0000000..bfe5d26 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c @@ -0,0 +1,64 @@ +/* Verify that overloaded built-ins for vec_extract() with char + inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// six tests total. Targeting P8LE / P8BE. +// P8 LE variable offset: rldicl, subfic, sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, (extsb) +// P8 LE constant offset: vspltb, mfvsrd, rlwinm, (extsb) +// P8 BE variable offset: sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, (extsb) +// P8 BE constant offset: vspltb, mfvsrd, rlwinm, (extsb) + +/* { dg-final { scan-assembler-times {\mrldicl\M} 3 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\msubfic\M} 3 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\msldi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 } } */ +/* { dg-final { scan-assembler-times {\msradi\M} 3 } } */ +/* { dg-final { scan-assembler-times "extsb" 2 } } */ +/* { dg-final { scan-assembler-times {\mvspltb\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrlwinm\M} 2 } } */ + +#include + +unsigned char +testbc_var (vector bool char vbc2,signed int si) +{ + return vec_extract (vbc2, si); +} + +signed char +testsc_var (vector signed char vsc2, signed int si) +{ + return vec_extract (vsc2, si); +} + +unsigned char +testuc_var (vector unsigned char vuc2, signed int si) +{ + return vec_extract (vuc2, si); +} + +unsigned char +testbc_cst (vector bool char vbc2) +{ + return vec_extract (vbc2, 12); +} + +signed char +testsc_cst (vector signed char vsc2) +{ + return vec_extract (vsc2, 12); +} + +unsigned char +testuc_cst (vector unsigned char vuc2) +{ + return vec_extract (vuc2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c new file mode 100644 index 0000000..c5880e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c @@ -0,0 +1,51 @@ +/* Verify that overloaded built-ins for vec_extract() with char + inputs produce the right code with a P9 (LE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2 " } */ + +/* { dg-final { scan-assembler-times {\mli\M} 3 } } */ +/* Endian sensitive, vextubrx or vextublx. */ +/* { dg-final { scan-assembler-times "vextubrx|vextublx" 6 } } */ +/* { dg-final { scan-assembler-times "extsb" 2 } } */ + +#include + +unsigned char +testbc_var (vector bool char vbc2,signed int si) +{ + return vec_extract (vbc2, si); +} + +signed char +testsc_var (vector signed char vsc2, signed int si) +{ + return vec_extract (vsc2, si); +} + +unsigned char +testuc_var (vector unsigned char vuc2, signed int si) +{ + return vec_extract (vuc2, si); +} + +unsigned char +testbc_cst (vector bool char vbc2) +{ + return vec_extract (vbc2, 12); +} + +signed char +testsc_cst (vector signed char vsc2) +{ + return vec_extract (vsc2, 12); +} + +unsigned char +testuc_cst (vector unsigned char vuc2) +{ + return vec_extract (vuc2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c new file mode 100644 index 0000000..6f95625 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -0,0 +1,33 @@ +/* Verify that overloaded built-ins for vec_extract() with + double inputs produce the right code. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-maltivec -mcpu=power7 -O2 -mbig-endian" } */ + +// targeting P7 (BE), 2 tests. +// P7 constants: xxpermdi +// P7 variables: li, addi, rldic, addi, stxvd2x, lfdx + +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mli\M} 1 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfdx\M} 1 } } */ + +#include + +double +testd_var (vector double vd2, signed int si) +{ + return vec_extract (vd2, si); +} + +double +testd_cst (vector double vd2) +{ + return vec_extract (vd2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c new file mode 100644 index 0000000..f5acc58 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_extract() with + double inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// targeting P8, BE and LE. 2 tests. +// P8 (LE) constants: xxlor +// P8 (LE) variables: xori, rldic, mtvsrd, xxpermdi, vslo, xxlor +// P8 (BE) constants: xxpermdi +// P8 (BE) variables: rldic, mtvsrd, xxpermdi, vslo, xxlor + +/* { dg-final { scan-assembler-times {\mxxlor\M} 2 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mxxlor\M} 1 { target { ! le } } } } */ +/* { dg-final { scan-assembler-times {\mxori\M} 1 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 2 { target { ! le } } } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ + +#include + +double +testd_var (vector double vd2, signed int si) +{ + return vec_extract (vd2, si); +} + +double +testd_cst (vector double vd2) +{ + return vec_extract (vd2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c new file mode 100644 index 0000000..c5a2a13 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c @@ -0,0 +1,27 @@ +/* Verify that overloaded built-ins for vec_extract() with + double inputs produce the right code. */ + +/* { dg-do compile { target { p9vector_hw } } } */ +/* { dg-require-effective-target p9vector_hw } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2 " } */ + +/* { dg-final { scan-assembler-times {\mxxlor\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ + +#include + +double +testd_var (vector double vd2, signed int si) +{ + return vec_extract (vd2, si); +} + +double +testd_cst (vector double vd2) +{ + return vec_extract (vd2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c new file mode 100644 index 0000000..88f030b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -0,0 +1,33 @@ +/* Verify that overloaded built-ins for vec_extract() with float + inputs produce the right code with a P7 (BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-mcpu=power7 -O2 " } */ + +// targeting P7 (BE), 2 tests. +// P7 constants: xscvspdp +// P7 variables: li, addi, stxvd2x, rldic, addi, lfsx + +/* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mli\M} 1 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfsx\M} 1 } } */ + +#include + +float +testf_var (vector float vf2, signed int si) +{ + return vec_extract (vf2, si); +} + +float +testf_cst (vector float vf2) +{ + return vec_extract (vf2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c new file mode 100644 index 0000000..b7c7d61 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -0,0 +1,38 @@ +/* Verify that overloaded built-ins for vec_extract() with float + inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// targeting P8, BE and LE. 2 tests. +// P8 (LE) constants: xxsldwi, xscvspdp +// P8 (LE) variables: rldicl, subfic, sldi, mtvsrd, xxpermdi, vslo, xscvspdp +// P8 (BE) constants: xscvspdp +// P8 (BE) variables: sldi, mtvsrd, xxpermdi, vslo, xscvspdp + +/* { dg-final { scan-assembler-times {\mxxsldwi\M} 1 { target { powerpc*le-*-* } } } } */ +/* { dg-final { scan-assembler-times {\mxscvspdp\M} 2 } } */ + +/* { dg-final { scan-assembler-times {\mrldicl\M} 1 { target { powerpc*le-*-* } } } } */ +/* { dg-final { scan-assembler-times {\msubfic\M} 1 { target { powerpc*le-*-* } } } } */ +/* { dg-final { scan-assembler-times {\msldi\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ + +#include + +float +testf_var (vector float vf2, signed int si) +{ + return vec_extract (vf2, si); +} + +float +testf_cst (vector float vf2) +{ + return vec_extract (vf2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c new file mode 100644 index 0000000..d8776b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c @@ -0,0 +1,29 @@ +/* Verify that overloaded built-ins for vec_extract() with float + inputs produce the right code. */ + +/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2 " } */ + +/* { dg-final { scan-assembler-times {\mxscvspdp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 1 } } */ +/* { dg-final { scan-assembler-times {\msubfic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\msldi\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ + +#include + +float +testf_var (vector float vf2, signed int si) +{ + return vec_extract (vf2, si); +} + +float +testf_cst (vector float vf2) +{ + return vec_extract (vf2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c new file mode 100644 index 0000000..9c2e2ff --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -0,0 +1,56 @@ +/* Verify that overloaded built-ins for vec_extract() with int + inputs produce the right code with a P7 (BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-mcpu=power7 -O2 " } */ + +// Targeting P7 (BE). 6 tests total. +// P7 constant: li, addi, stxvw4x, rldic, addi, lwzx/lwax +// P7 variables: li, addi, stxvw4x, lwa/lwz + +/* { dg-final { scan-assembler-times {\mli\M} 6 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */ +/* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlwzx\M|\mlwax\M} 3 } } */ + +#include + +unsigned int +testbi_var (vector bool int vbi2, signed int si) +{ + return vec_extract (vbi2, si); +} + +signed int +testsi_var (vector signed int vsi2, signed int si) +{ + return vec_extract (vsi2, si); +} + +unsigned int +testui_var (vector unsigned int vui2, signed int si) +{ + return vec_extract (vui2, si); +} + +unsigned int +testbi_cst (vector bool int vbi2) +{ + return vec_extract (vbi2, 12); +} + +signed int +testsi_cst (vector signed int vsi2) +{ + return vec_extract (vsi2, 12); +} + +unsigned int +testui_cst (vector unsigned int vui2) +{ + return vec_extract (vui2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c new file mode 100644 index 0000000..c2b731c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -0,0 +1,65 @@ +/* Verify that overloaded built-ins for vec_extract() with int + inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// Targeting P8 (LE) and (BE). 6 tests total. +// P8 LE constant: vspltw, mfvsrwz, (1:extsw/2:rldicl) +// P8 LE variables: rldicl, subfic, sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, (1:extsw) +// P8 BE constant: vspltw, mfvsrwz, (1:extsw/2:rldicl) +// P8 BE variables: sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, (1:extsw) + +/* { dg-final { scan-assembler-times {\mvspltw\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 5 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 2 { target { ! le } } } } */ +/* { dg-final { scan-assembler-times {\msubfic\M} 3 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\msldi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\msradi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mextsw\M} 2 } } */ + +#include + +unsigned int +testbi_var (vector bool int vbi2, signed int si) +{ + return vec_extract (vbi2, si); +} + +signed int +testsi_var (vector signed int vsi2, signed int si) +{ + return vec_extract (vsi2, si); +} + +unsigned int +testui_var (vector unsigned int vui2, signed int si) +{ + return vec_extract (vui2, si); +} + +unsigned int +testbi_cst (vector bool int vbi2) +{ + return vec_extract (vbi2, 12); +} + +signed int +testsi_cst (vector signed int vsi2) +{ + return vec_extract (vsi2, 12); +} + +unsigned int +testui_cst (vector unsigned int vui2) +{ + return vec_extract (vui2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c new file mode 100644 index 0000000..fa27820 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c @@ -0,0 +1,55 @@ +/* Verify that overloaded built-ins for vec_extract() with int + inputs produce the right code with a P9 (LE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2 " } */ + +// Targeting P9 (LE). 6 tests total. +// P9 constant: li, vextuwrx, (1:extsw) +// P9 variables: slwi, vextuwrx, (1:extsw) + +/* { dg-final { scan-assembler-times {\mli\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mslwi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvextuwrx\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mextsw\M} 2 } } */ + +#include + +unsigned int +testbi_var (vector bool int vbi2, signed int si) +{ + return vec_extract (vbi2, si); +} + +signed int +testsi_var (vector signed int vsi2, signed int si) +{ + return vec_extract (vsi2, si); +} + +unsigned int +testui_var (vector unsigned int vui2, signed int si) +{ + return vec_extract (vui2, si); +} + +unsigned int +testbi_cst (vector bool int vbi2) +{ + return vec_extract (vbi2, 12); +} + +signed int +testsi_cst (vector signed int vsi2) +{ + return vec_extract (vsi2, 12); +} + +unsigned int +testui_cst (vector unsigned int vui2) +{ + return vec_extract (vui2, 12); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c new file mode 100644 index 0000000..0f0b1ca --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c @@ -0,0 +1,58 @@ +/* Verify that overloaded built-ins for vec_extract() with long long + inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-mcpu=power7 -O2 " } */ + +// Targeting P7. six tests total. +// P7 with constants: xxpermdi, stfd, ld +// P7 with variables: li, addi, stxvd2x, rldic, addi, ldx + +/* { dg-final { scan-assembler-times {\mstfd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mld\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mli\M} 3 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mldx\M} 3 } } */ + +#include + +unsigned long long +testbl_var (vector bool long long vbl2, signed int si) +{ + return vec_extract (vbl2, si); +} + +signed long long +testsl_var (vector signed long long vsl2,signed int si) +{ + return vec_extract (vsl2, si); +} + +unsigned long long +testul_var (vector unsigned long long vul2,signed int si) +{ + return vec_extract (vul2, si); +} + +unsigned long long +testbl_cst (vector bool long long vbl2,signed int si) +{ + return vec_extract (vbl2, 1); +} + +signed long long +testsl_cst (vector signed long long vsl2,signed int si) +{ + return vec_extract (vsl2, 1); +} + +unsigned long long +testul_cst (vector unsigned long vul2,signed int si) +{ + return vec_extract (vul2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c new file mode 100644 index 0000000..6b45bf1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c @@ -0,0 +1,60 @@ +/* Verify that overloaded built-ins for vec_extract() with long long + inputs produce the right code with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// targeting P8, both LE and BE. six tests. +// P8 (LE) constants: mfvsrd +// P8 (LE) variables: xori, rldic, mtvsrd, xxpermdi, vslo, mfvsrd +// P8 (BE) constants: xxpermdi, mfvsrd +// P8 (BE) Variables: rldic, mtvsrd, xxpermdi, vslo, mfvsrd + +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mxori\M} 3 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target { le } } } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 6 { target { ! le } } } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 3 } } */ + +#include + +unsigned long long +testbl_var (vector bool long long vbl2, signed int si) +{ + return vec_extract (vbl2, si); +} + +signed long long +testsl_var (vector signed long long vsl2, signed int si) +{ + return vec_extract (vsl2, si); +} + +unsigned long long +testul_var (vector unsigned long long vul2, signed int si) +{ + return vec_extract (vul2, si); +} + +unsigned long long +testbl_cst (vector bool long long vbl2) +{ + return vec_extract (vbl2, 1); +} + +signed long long +testsl_cst (vector signed long long vsl2) +{ + return vec_extract (vsl2, 1); +} + +unsigned long long +testul_cst (vector unsigned long vul2) +{ + return vec_extract (vul2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c new file mode 100644 index 0000000..ce46ff7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c @@ -0,0 +1,56 @@ +/* Verify that overloaded built-ins for vec_extract() with long long + inputs produce the right code for a P9 (LE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +// targeting P9 (LE), six tests. +// p9 constants: mfvsrd +// p9 vars: xori, rldic, mtvsrdd, vslo, mfvsrd + +/* { dg-final { scan-assembler-times {\mxori\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 } } */ + +#include + +unsigned long long +testbl_var (vector bool long long vbl2, signed int si) +{ + return vec_extract (vbl2, si); +} + +signed long long +testsl_var (vector signed long long vsl2,signed int si) +{ + return vec_extract (vsl2, si); +} + +unsigned long long +testul_var (vector unsigned long long vul2,signed int si) +{ + return vec_extract (vul2, si); +} + +unsigned long long +testbl_cst (vector bool long long vbl2) +{ + return vec_extract (vbl2, 1); +} + +signed long long +testsl_cst (vector signed long long vsl2) +{ + return vec_extract (vsl2, 1); +} + +unsigned long long +testul_cst (vector unsigned long vul2) +{ + return vec_extract (vul2, 1); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c new file mode 100644 index 0000000..4b03f3b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -0,0 +1,56 @@ +/* Verify that overloaded built-ins for vec_extract() with short + inputs produce the right code for a P7 (BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-mcpu=power7 -O2" } */ + +// six tests total. Targeting P7 BE. +// p7 (be) vars: li, addi, stxvw4x, rldic, addi, lhax/lhzx +// P7 (be) constants: li, addi, stxvw4x, lha/lhz + +/* { dg-final { scan-assembler-times {\mli\M} 6 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */ +/* { dg-final { scan-assembler-times "rldic" 3 } } */ +/* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ +/* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ + +#include + +unsigned short +testbi_cst (vector bool short vbs2) +{ + return vec_extract (vbs2, 12); +} + +signed short +testsi_cst (vector signed short vss2) +{ + return vec_extract (vss2, 12); +} + +unsigned short +testui_cst12 (vector unsigned short vus2) +{ + return vec_extract (vus2, 12); +} + +unsigned short +testbi_var (vector bool short vbs2, signed int si) +{ + return vec_extract (vbs2, si); +} + +signed short +testsi_var (vector signed short vss2, signed int si) +{ +return vec_extract (vss2, si); +} + +unsigned short +testui_var (vector unsigned short vus2, signed int si) +{ +return vec_extract (vus2, si); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c new file mode 100644 index 0000000..42a59b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -0,0 +1,68 @@ +/* Verify that overloaded built-ins for vec_extract() with short + inputs produce the right results with a P8 (LE or BE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +// six tests total. Targeting P8, both LE and BE. +// p8 (le) variable offset: rldicl, subfic, sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, *extsh +// p8 (le) const offset: mtvsrd, *extsh/rlwinm +// p8 (be) var offset: sldi, mtvsrd, xxpermdi, vslo, mfvsrd, sradi, *extsh +// p8 (be) const offset: vsplth, mfvsrd, *extsh/rlwinm + +// * - each of the above will have an extsh if the argument is signed. +// * - bool and unsigned tests also have an rlwinm. + +/* { dg-final { scan-assembler-times "rldicl" 3 {target { le } } } } */ +/* { dg-final { scan-assembler-times "subfic" 3 {target { le } } } } */ +/* { dg-final { scan-assembler-times "vsplth" 3 { target { ! le } } } } */ +/* { dg-final { scan-assembler-times "sldi" 3 } } */ +/* { dg-final { scan-assembler-times "mtvsrd" 3 } } */ +/* { dg-final { scan-assembler-times "xxpermdi" 3 } } */ +/* { dg-final { scan-assembler-times "vslo" 3 } } */ +/* { dg-final { scan-assembler-times "mfvsrd" 6 } } */ +/* { dg-final { scan-assembler-times "sradi" 3 } } */ +/* { dg-final { scan-assembler-times "extsh" 2 } } */ +/* { dg-final { scan-assembler-times "rlwinm" 2 } } */ + + +#include + +unsigned short +testbi_cst (vector bool short vbs2) +{ + return vec_extract (vbs2, 12); +} + +signed short +testsi_cst (vector signed short vss2) +{ + return vec_extract (vss2, 12); +} + +unsigned short +testui_cst12 (vector unsigned short vus2) +{ + return vec_extract (vus2, 12); +} + +unsigned short +testbi_var (vector bool short vbs2, signed int si) +{ + return vec_extract (vbs2, si); +} + +signed short +testsi_var (vector signed short vss2, signed int si) +{ +return vec_extract (vss2, si); +} + +unsigned short +testui_var (vector unsigned short vus2, signed int si) +{ +return vec_extract (vus2, si); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c new file mode 100644 index 0000000..b45f3cf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c @@ -0,0 +1,55 @@ +/* Verify that overloaded built-ins for vec_extract() with short + inputs produce the right code for a P9 (LE) target. */ + +/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +// six tests total. Targeting P9 LE. +// p9 (le) variable offset: slwi, vextuhlx, extsh +// p9 (le) const offset: li, vextuhlx, extsh + +/* { dg-final { scan-assembler-times {\mslwi\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mli\M} 3 } } */ +/* { dg-final { scan-assembler-times "vextuhrx" 6 } } */ +/* { dg-final { scan-assembler-times {\mextsh\M} 2 } } */ + +#include + +unsigned short +testbi_cst (vector bool short vbs2) +{ + return vec_extract (vbs2, 12); +} + +signed short +testsi_cst (vector signed short vss2) +{ + return vec_extract (vss2, 12); +} + +unsigned short +testui_cst12 (vector unsigned short vus2) +{ + return vec_extract (vus2, 12); +} + +unsigned short +testbi_var (vector bool short vbs2, signed int si) +{ + return vec_extract (vbs2, si); +} + +signed short +testsi_var (vector signed short vss2, signed int si) +{ +return vec_extract (vss2, si); +} + +unsigned short +testui_var (vector unsigned short vus2, signed int si) +{ +return vec_extract (vus2, si); +} +