@@ -22,12 +22,6 @@ test_eq_int (vector bool int x, vector bool int y)
return vec_cmpeq (x, y);
}
-vector double
-test_shift_left_double (vector double x, vector double y)
-{
- return vec_sld (x, y, /* shift_by */ 10);
-}
-
vector signed char
test_nabs_char (vector signed char x)
{
@@ -46,18 +40,6 @@ test_nabs_int (vector int x)
return vec_nabs (x);
}
-vector float
-test_nabs_float (vector float x)
-{
- return vec_nabs (x);
-}
-
-vector double
-test_nabs_double (vector double x)
-{
- return vec_nabs (x);
-}
-
vector signed char
test_sll_vsc_vsc_vsuc (vector signed char x, vector unsigned char y)
{
@@ -82,40 +64,6 @@ test_sll_vui_vui_vuc (vector unsigned int x, vector unsigned char y)
return vec_sll (x, y);
}
-vector signed int long long
-test_sll_vsill_vsill_vuc (vector signed long long int x,
- vector unsigned char y)
-{
- return vec_sll (x, y);
-}
-
-vector unsigned int long long
-test_sll_vuill_vuill_vuc (vector unsigned long long int x,
- vector unsigned char y)
-{
- return vec_sll (x, y);
-}
-
-vector bool long long
-test_sll_vbll_vbll_vuc (vector bool long long x,
- vector unsigned char y)
-{
- return vec_sll (x, y);
-}
-
-vector bool long long
-test_sll_vbll_vbll_vull (vector bool long long x,
- vector unsigned long long y)
-{
- return vec_sll (x, y);
-}
-
-vector bool long long
-test_sll_vbll_vbll_vus (vector bool long long x,
- vector unsigned short y)
-{
- return vec_sll (x, y);
-}
vector pixel
test_sll_vp_vp_vuc (vector pixel x, vector unsigned char y)
{
@@ -182,30 +130,6 @@ test_slo_vui_vui_vuc (vector unsigned int x, vector unsigned char y)
return vec_slo (x, y);
}
-vector signed long long
-test_slo_vsll_slo_vsll_vsc (vector signed long long x, vector signed char y)
-{
- return vec_slo (x, y);
-}
-
-vector signed long long
-test_slo_vsll_slo_vsll_vuc (vector signed long long x, vector unsigned char y)
-{
- return vec_slo (x, y);
-}
-
-vector unsigned long long
-test_slo_vull_slo_vull_vsc (vector unsigned long long x, vector signed char y)
-{
- return vec_slo (x, y);
-}
-
-vector unsigned long long
-test_slo_vull_slo_vull_vuc (vector unsigned long long x,
- vector unsigned char y)
-{
- return vec_slo (x, y);
-}
vector pixel
test_slo_vp_vp_vsc (vector pixel int x, vector signed char y)
@@ -255,57 +179,6 @@ test_slo_vf_vf_vuc (vector float x, vector unsigned char y)
return vec_slo (x, y);
}
-vector signed char
-test_vsc_sldw_vsc_vsc (vector signed char x, vector signed char y)
-{
- return vec_sldw (x, y, 1);
-}
-
-vector unsigned char
-test_vuc_sldw_vuc_vuc (vector unsigned char x, vector unsigned char y)
-{
- return vec_sldw (x, y, 3);
-}
-
-vector signed short int
-test_vssi_sldw_vssi_vssi (vector signed short int x,
- vector signed short int y)
-{
- return vec_sldw (x, y, 1);
-}
-
-vector unsigned short int
-test_vusi_sldw_vusi_vusi (vector unsigned short int x,
- vector unsigned short int y)
-{
- return vec_sldw (x, y, 3);
-}
-
-vector signed int
-test_vsi_sldw_vsi_vsi (vector signed int x, vector signed int y)
-{
- return vec_sldw (x, y, 1);
-}
-
-vector unsigned int
-test_vui_sldw_vui_vui (vector unsigned int x, vector unsigned int y)
-{
- return vec_sldw (x, y, 3);
-}
-
-vector signed long long
-test_vsl_sldw_vsl_vsl (vector signed long long x, vector signed long long y)
-{
- return vec_sldw (x, y, 1);
-}
-
-vector unsigned long long
-test_vul_sldw_vul_vul (vector unsigned long long x,
- vector unsigned long long y)
-{
- return vec_sldw (x, y, 3);
-}
-
vector int
test_cmpb_float (vector float x, vector float y)
{
@@ -317,21 +190,13 @@ test_cmpb_float (vector float x, vector float y)
test_eq_char 1 vcmpequb inst
test_eq_short 1 vcmpequh inst
test_eq_int 1 vcmpequw inst
- test_shift_left_double 1 vsldoi inst
- test_nabs_char 1 vspltisw, 1 vsububm, 1 vminsb
- test_nabs_short 1 vspltisw, 1 vsubuhm, 1 vminsh
- test_nabs_int 1 vspltisw, 1 vsubuwm, 1 vminsw
- test_nabs_float 1 xvnabssp
- test_nabs_double 1 xvnabsdp
+ test_nabs_char 1 vsububm, 1 vminsb
+ test_nabs_short 1 vsubuhm, 1 vminsh
+ test_nabs_int 1 vsubuwm, 1 vminsw
test_sll_vsc_vsc_vsuc 1 vsl
test_sll_vuc_vuc_vuc 1 vsl
test_sll_vsi_vsi_vuc 1 vsl
test_sll_vui_vui_vuc 1 vsl
- test_sll_vsill_vsill_vuc 1 vsl
- test_sll_vuill_vuill_vuc 1 vsl
- test_sll_vbll_vbll_vuc 1 vsl
- test_sll_vbll_vbll_vull 1 vsl
- test_sll_vbll_vbll_vus 1 vsl
test_sll_vp_vp_vuc 1 vsl
test_sll_vssi_vssi_vuc 1 vsl
test_sll_vusi_vusi_vuc 1 vsl
@@ -343,10 +208,6 @@ test_cmpb_float (vector float x, vector float y)
test_slo_vsi_vsi_vuc 1 vslo
test_slo_vui_vui_vsc 1 vslo
test_slo_vui_vui_vuc 1 vslo
- test_slo_vsll_slo_vsll_vsc 1 vslo
- test_slo_vsll_slo_vsll_vuc 1 vslo
- test_slo_vull_slo_vull_vsc 1 vslo
- test_slo_vull_slo_vull_vuc 1 vslo
test_slo_vp_vp_vsc 1 vslo
test_slo_vp_vp_vuc 1 vslo
test_slo_vssi_vssi_vsc 1 vslo
@@ -355,32 +216,17 @@ test_cmpb_float (vector float x, vector float y)
test_slo_vusi_vusi_vuc 1 vslo
test_slo_vf_vf_vsc 1 vslo
test_slo_vf_vf_vuc 1 vslo
- test_vsc_sldw_vsc_vsc 1 xxsldwi
- test_vuc_sldw_vuc_vuc 1 xxsldwi
- test_vssi_sldw_vssi_vssi 1 xxsldwi
- test_vusi_sldw_vusi_vusi 1 xxsldwi
- test_vsi_sldw_vsi_vsi 1 xxsldwi
- test_vui_sldw_vui_vui 1 xxsldwi
- test_vsl_sldw_vsl_vsl 1 xxsldwi
- test_vul_sldw_vul_vul 1 xxsldwi
test_cmpb_float 1 vcmpbfp */
/* { dg-final { scan-assembler-times "vcmpequb" 1 } } */
/* { dg-final { scan-assembler-times "vcmpequh" 1 } } */
/* { dg-final { scan-assembler-times "vcmpequw" 1 } } */
-/* { dg-final { scan-assembler-times "vsldoi" 1 } } */
/* { dg-final { scan-assembler-times "vsububm" 1 } } */
/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
/* { dg-final { scan-assembler-times "vminsb" 1 } } */
/* { dg-final { scan-assembler-times "vminsh" 1 } } */
/* { dg-final { scan-assembler-times "vminsw" 1 } } */
-/* { dg-final { scan-assembler-times "vspltisw" 3 } } */
-/* { dg-final { scan-assembler-times "xvnabssp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
-/* { dg-final { scan-assembler-times "vslo" 20 } } */
-/* { dg-final { scan-assembler-times "xxsldwi" 8 } } */
+/* { dg-final { scan-assembler-times "vslo" 16 } } */
/* { dg-final { scan-assembler-times "vcmpbfp" 1 } } */
-/* { dg-final { scan-assembler-times "vsl" 68 { target le } } } */
-/* { dg-final { scan-assembler-times "vsl" 68 { target { be && ilp32 } } } } */
-/* { dg-final { scan-assembler-times "vsl" 82 { target { be && lp64 } } } } */
+/* { dg-final { scan-assembler-times "vsl" 23 } } */
new file mode 100644
@@ -0,0 +1,167 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-mvsx" } */
+
+#include <altivec.h>
+
+vector double
+test_shift_left_double (vector double x, vector double y)
+{
+ return vec_sld (x, y, /* shift_by */ 10);
+}
+
+vector float
+test_nabs_float (vector float x)
+{
+ return vec_nabs (x);
+}
+
+vector double
+test_nabs_double (vector double x)
+{
+ return vec_nabs (x);
+}
+
+vector bool long long
+test_sll_vbll_vbll_vuc (vector bool long long x,
+ vector unsigned char y)
+{
+ return vec_sll (x, y);
+}
+
+vector bool long long
+test_sll_vbll_vbll_vull (vector bool long long x,
+ vector unsigned long long y)
+{
+ return vec_sll (x, y);
+}
+
+vector bool long long
+test_sll_vbll_vbll_vus (vector bool long long x,
+ vector unsigned short y)
+{
+ return vec_sll (x, y);
+}
+
+vector signed long long
+test_slo_vsll_slo_vsll_vsc (vector signed long long x, vector signed char y)
+{
+ return vec_slo (x, y);
+}
+
+vector signed long long
+test_slo_vsll_slo_vsll_vuc (vector signed long long x, vector unsigned char y)
+{
+ return vec_slo (x, y);
+}
+
+vector unsigned long long
+test_slo_vull_slo_vull_vsc (vector unsigned long long x, vector signed char y)
+{
+ return vec_slo (x, y);
+}
+
+vector unsigned long long
+test_slo_vull_slo_vull_vuc (vector unsigned long long x,
+ vector unsigned char y)
+{
+ return vec_slo (x, y);
+}
+
+vector signed char
+test_vsc_sldw_vsc_vsc (vector signed char x, vector signed char y)
+{
+ return vec_sldw (x, y, 1);
+}
+
+vector unsigned char
+test_vuc_sldw_vuc_vuc (vector unsigned char x, vector unsigned char y)
+{
+ return vec_sldw (x, y, 3);
+}
+
+vector signed short int
+test_vssi_sldw_vssi_vssi (vector signed short int x,
+ vector signed short int y)
+{
+ return vec_sldw (x, y, 1);
+}
+
+vector unsigned short int
+test_vusi_sldw_vusi_vusi (vector unsigned short int x,
+ vector unsigned short int y)
+{
+ return vec_sldw (x, y, 3);
+}
+
+vector signed int
+test_vsi_sldw_vsi_vsi (vector signed int x, vector signed int y)
+{
+ return vec_sldw (x, y, 1);
+}
+
+vector unsigned int
+test_vui_sldw_vui_vui (vector unsigned int x, vector unsigned int y)
+{
+ return vec_sldw (x, y, 3);
+}
+
+vector signed long long
+test_vsl_sldw_vsl_vsl (vector signed long long x, vector signed long long y)
+{
+ return vec_sldw (x, y, 1);
+}
+
+vector unsigned long long
+test_vul_sldw_vul_vul (vector unsigned long long x,
+ vector unsigned long long y)
+{
+ return vec_sldw (x, y, 3);
+}
+
+vector signed int long long
+test_sll_vsill_vsill_vuc (vector signed long long int x,
+ vector unsigned char y)
+{
+ return vec_sll (x, y);
+}
+
+vector unsigned int long long
+test_sll_vuill_vuill_vuc (vector unsigned long long int x,
+ vector unsigned char y)
+{
+ return vec_sll (x, y);
+}
+
+
+/* Expected test results:
+
+ test_shift_left_double 1 vsldoi
+ test_nabs_float 1 xvnabssp
+ test_nabs_double 1 xvnabsdp
+ test_sll_vbll_vbll_vuc 1 vsl
+ test_sll_vbll_vbll_vull 1 vsl
+ test_sll_vbll_vbll_vus 1 vsl
+ test_slo_vsll_slo_vsll_vsc 1 vslo
+ test_slo_vsll_slo_vsll_vuc 1 vslo
+ test_slo_vull_slo_vull_vsc 1 vslo
+ test_slo_vull_slo_vull_vuc 1 vslo
+ test_vsc_sldw_vsc_vsc 1 xxlor
+ test_vuc_sldw_vuc_vuc 1 xxlor
+ test_vssi_sldw_vssi_vssi 1 xxlor
+ test_vusi_sldw_vusi_vusi 1 xxlor
+ test_vsi_sldw_vsi_vsi 1 xxlor
+ test_vui_sldw_vui_vui 1 xxlor
+ test_vsl_sldw_vsl_vsl 1 xxlor
+ test_vul_sldw_vul_vul 1 xxlor
+ test_sll_vsill_vsill_vuc 1 vsl
+ test_sll_vuill_vuill_vuc 1 vsl */
+
+/* { dg-final { scan-assembler-times "vsldoi" 1 } } */
+/* { dg-final { scan-assembler-times "xvnabssp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
+/* { dg-final { scan-assembler-times "vslo" 4 } } */
+/* { dg-final { scan-assembler-times "xxlor" 30 } } */
+/* { dg-final { scan-assembler-times "vsl" 45 { target le } } } */
+/* { dg-final { scan-assembler-times "vsl" 45 { target { be && ilp32 } } } } */
+/* { dg-final { scan-assembler-times "vsl" 59 { target { be && lp64 } } } } */
GCC Maintainers: The builtins-3.c test fails on Power 6 since -mvsx is not enabled with the -maltivec option. The following patch moves the tests from builtins-3.c that require the -mvsx" command line option to the new test file builtins-4.c. The tests that are left in file builtins-3.c require just the -maltivec option. The patch was retested on: powerpc64le-unknown-linux-gnu (Power 8 LE) powerpc64le-unknown-linux-gnu (Power 9 LE) powerpc64-unknown-linux-gnu (Power 8 BE) With no regressions. The following manual tests were also run make -k check-gcc RUNTESTFLAGS="-mcpu=power6 --target_board=unix'{-m64,-m32}' powerpc.exp=builtins-3.c" make -k check-gcc RUNTESTFLAGS="-mcpu=power6 --target_board=unix'{-m64,-m32}' powerpc.exp=builtins-4.c" to verify the tests work on Power 6. Please let me know if the patch looks OK for GCC mainline. Carl Love --------------------------------------------------------------------- gcc/testsuite/ChangeLog: 2018-06-05 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/builtins-3.c: Move tests requiring -mvsx to builtins-4.c. * gcc.target/powerpc/builtins-4.c: New test file for tests that need -mvsx. --- gcc/testsuite/gcc.target/powerpc/builtins-3.c | 164 +------------------------ gcc/testsuite/gcc.target/powerpc/builtins-4.c | 167 ++++++++++++++++++++++++++ 2 files changed, 172 insertions(+), 159 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/builtins-4.c