From patchwork Wed Sep 6 16:24:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carl Love X-Patchwork-Id: 810717 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-461630-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="DUwfuf8n"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xnTT41803z9s7F for ; Thu, 7 Sep 2017 02:25:11 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:cc:date:content-type:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=Mt4bZ MQxuwbyw4r9GbLTJ0Kse/leYlRIHtateiuX9nYhAYa5jqMRLcu5sraszOfYFeTfv yb1bBHRhG7b4/qxKO3ciG30rHwiZyjJ127CiS6Fe+lpwZ6icMm1TZSdCPq0N8roJ tRLkssYQlOAHHcU1bQVbBr/H9nFuN32mx8OXXM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:cc:date:content-type:mime-version :content-transfer-encoding:message-id; s=default; bh=hPmpri97ouo ap0M4vaBaq8Hk7Bc=; b=DUwfuf8nGp8zR82jB3BF10uPMGVLZOMZtCU5TGVg8Vn lnWOKwBXReEKbPKGYyWRMuxBkXfM6ujLnuqMNHsM2rXHmGrLKTqTvL2KqYY+09h6 IS3HiDTPLITfywLgLIZ5Nek+dkP63NhujK5eZD7r4K5IkqiDctpMkQNxUh/4+Nm4 = Received: (qmail 96122 invoked by alias); 6 Sep 2017 16:24:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 96109 invoked by uid 89); 6 Sep 2017 16:24:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=0001, 22318 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 06 Sep 2017 16:24:56 +0000 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v86GOVs8103440 for ; Wed, 6 Sep 2017 12:24:55 -0400 Received: from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150]) by mx0b-001b2d01.pphosted.com with ESMTP id 2cthjqmty5-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 06 Sep 2017 12:24:34 -0400 Received: from localhost by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 6 Sep 2017 10:24:08 -0600 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v86GO8Gw65667316; Wed, 6 Sep 2017 09:24:08 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 54E4DC603E; Wed, 6 Sep 2017 10:24:08 -0600 (MDT) Received: from oc3304648336.ibm.com (unknown [9.70.82.190]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP id DB96FC603C; Wed, 6 Sep 2017 10:24:07 -0600 (MDT) Subject: [PATCH, rs6000] Add builtins to convert from float/double to int/long using current rounding mode From: Carl Love To: gcc-patches@gcc.gnu.org, David Edelsohn , Segher Boessenkool Cc: Bill Schmidt , cel@us.ibm.com Date: Wed, 06 Sep 2017 09:24:07 -0700 Mime-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17090616-0004-0000-0000-000012E172E1 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007678; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000226; SDB=6.00913145; UDB=6.00458277; IPR=6.00693408; BA=6.00005574; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017035; XFM=3.00000015; UTC=2017-09-06 16:24:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17090616-0005-0000-0000-000081024E8C Message-Id: <1504715047.18797.12.camel@us.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-09-06_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709060231 X-IsSubscribed: yes GCC Maintainers: The following patch adds support for a couple of requested builtins that convert from float/double to int / long using the current rounding mode. The patch has been tested on powerpc64le-unknown-linux-gnu (Power 8 LE). Please let me know if the following patch is acceptable. Thanks. Carl Love ----------------------------------------------------------------------- gcc/ChangeLog: 2017-09-06 Carl Love * config/rs6000/rs6000-builtin.def (FCTID, FCTIW): Add BU_P7_MISC_1 macro expansion for builtins. * config/rs6000/rs6000.md (fctid, fctiw): Add define_insn for the fctid and fctiw instructions. gcc/testsuite/ChangeLog: 2017-09-06 Carl Love * gcc.target/powerpc/builtin-fctid-fctiw-runnable.c: New test file for the __builtin_fctid and __builtin_fctiw builtins. --- gcc/config/rs6000/rs6000-builtin.def | 2 + gcc/config/rs6000/rs6000.md | 18 +++ .../powerpc/builtin-fctid-fctiw-runnable.c | 138 +++++++++++++++++++++ 3 files changed, 158 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 850164a..7affa30 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -2231,6 +2231,8 @@ BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td) /* 1 argument BCD functions added in ISA 2.06. */ BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd) BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd) +BU_P7_MISC_1 (FCTID, "fctid", CONST, fctid) +BU_P7_MISC_1 (FCTIW, "fctiw", CONST, fctiw) /* 2 argument BCD functions added in ISA 2.06. */ BU_P7_MISC_2 (ADDG6S, "addg6s", CONST, addg6s) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 20873ac..a5cbef5 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -14054,6 +14054,24 @@ [(set_attr "type" "integer") (set_attr "length" "4")]) +(define_insn "fctid" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec:DI [(match_operand:DF 1 "register_operand" "f")] + UNSPEC_FCTID))] + "" + "fctid %1,%1; mfvsrd %0,%1" + [(set_attr "type" "two") + (set_attr "length" "8")]) + +(define_insn "fctiw" + [(set (match_operand:SI 0 "register_operand" "=r") + (unspec:SI [(match_operand:DF 1 "register_operand" "f")] + UNSPEC_FCTIW))] + "" + "fctiw %1,%1; mfvsrd %0,%1; extsw %0,%0" + [(set_attr "type" "integer") + (set_attr "length" "4")]) + (define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE UNSPEC_DIVEO UNSPEC_DIVEU diff --git a/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c new file mode 100644 index 0000000..79c5341 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/builtin-fctid-fctiw-runnable.c @@ -0,0 +1,138 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8" } */ + +#ifdef DEBUG +#include +#endif + +void abort (void); + +long +test_bi_lrint_1 (float __A) +{ + return (__builtin_fctid (__A)); +} +long +test_bi_lrint_2 (double __A) +{ + return (__builtin_fctid (__A)); +} + +int +test_bi_rint_1 (float __A) +{ + return (__builtin_fctiw (__A)); +} + +int +test_bi_rint_2 (double __A) +{ + return (__builtin_fctiw (__A)); +} + + +int main( void) +{ + signed long lx, expected_l; + double dy; + + signed int x, expected_i; + float y; + + dy = 1.45; + expected_l = 1; + lx = __builtin_fctid (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: __builtin_fctid(dy= %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + dy = 3.51; + expected_l = 4; + lx = __builtin_fctid (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: __builtin_fctid(dy= %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + dy = 5.57; + expected_i = 6; + x = __builtin_fctiw (dy); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: __builtin_fctiw(dy= %f) = %d, expected %d\n", + dy, x, expected_i); +#else + abort(); +#endif + + y = 11.47; + expected_i = 11; + x = __builtin_fctiw (y); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: __builtin_fctiw(y = %f) = %d, expected %d\n", + y, x, expected_i); +#else + abort(); +#endif + + y = 17.77; + expected_l = 18; + lx = test_bi_lrint_1 (y); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: function call test_bi_lrint_1 (y = %f) = %ld, expected %ld\n", + y, lx, expected_l); +#else + abort(); +#endif + + dy = 7.1; + expected_l = 7; + lx = test_bi_lrint_2 (dy); + + if( lx != expected_l) +#ifdef DEBUG + printf("ERROR: function call test_bi_lrint_2 (dy = %f) = %ld, expected %ld\n", + dy, lx, expected_l); +#else + abort(); +#endif + + y = 0.001; + expected_i = 0; + x = test_bi_rint_1 (y); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: function call test_bi_rint_1 (y = %f) = %d, expected %d\n", + y, x, expected_i); +#else + abort(); +#endif + + dy = 0.9999; + expected_i = 1; + x = test_bi_rint_2 (dy); + + if( x != expected_i) +#ifdef DEBUG + printf("ERROR: function call test_bi_rint_2 (dy = %f) = %d, expected %d\n", + dy, x, expected_i); +#else + abort(); +#endif +}