diff mbox

[4/7,ARC] Change predicate movv2hi to avoid scaled addresses.

Message ID 1495189862-20533-5-git-send-email-claziss@synopsys.com
State New
Headers show

Commit Message

Claudiu Zissulescu May 19, 2017, 10:30 a.m. UTC
From: Claudiu Zissulescu <claziss@gmail.com>

2016-12-17  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/simdext.md (movv2hi_insn): Change predicate to avoid
	scaled addresses.
---
 gcc/config/arc/simdext.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Andrew Burgess May 31, 2017, 3:33 p.m. UTC | #1
* Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com> [2017-05-19 12:30:59 +0200]:

> From: Claudiu Zissulescu <claziss@gmail.com>
> 
> 2016-12-17  Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* config/arc/simdext.md (movv2hi_insn): Change predicate to avoid
> 	scaled addresses.

Seems reasonable.

Thanks,
Andrew


> ---
>  gcc/config/arc/simdext.md | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/gcc/config/arc/simdext.md b/gcc/config/arc/simdext.md
> index 5253033..6c102d3 100644
> --- a/gcc/config/arc/simdext.md
> +++ b/gcc/config/arc/simdext.md
> @@ -1356,7 +1356,7 @@
>     }")
>  
>  (define_insn_and_split "*movv2hi_insn"
> -  [(set (match_operand:V2HI 0 "nonimmediate_operand" "=r,r,r,m")
> +  [(set (match_operand:V2HI 0 "move_dest_operand" "=r,r,r,m")
>  	(match_operand:V2HI 1 "general_operand"       "i,r,m,r"))]
>    "(register_operand (operands[0], V2HImode)
>      || register_operand (operands[1], V2HImode))"
> -- 
> 1.9.1
>
Claudiu Zissulescu June 1, 2017, 9:47 a.m. UTC | #2
> Seems reasonable.
> 

Committed, thank you,
Claudiu
diff mbox

Patch

diff --git a/gcc/config/arc/simdext.md b/gcc/config/arc/simdext.md
index 5253033..6c102d3 100644
--- a/gcc/config/arc/simdext.md
+++ b/gcc/config/arc/simdext.md
@@ -1356,7 +1356,7 @@ 
    }")
 
 (define_insn_and_split "*movv2hi_insn"
-  [(set (match_operand:V2HI 0 "nonimmediate_operand" "=r,r,r,m")
+  [(set (match_operand:V2HI 0 "move_dest_operand" "=r,r,r,m")
 	(match_operand:V2HI 1 "general_operand"       "i,r,m,r"))]
   "(register_operand (operands[0], V2HImode)
     || register_operand (operands[1], V2HImode))"